1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #ifdef CONFIG_SECURE_BOOT
13 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
16 #define CONFIG_SPL_TEXT_BASE 0x7E1000
17 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
20 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
21 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
23 #ifdef CONFIG_SPL_BUILD
24 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
25 #define CONFIG_SPL_WATCHDOG_SUPPORT
26 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
27 #define CONFIG_SPL_POWER_SUPPORT
28 #define CONFIG_SPL_I2C_SUPPORT
29 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
30 #define CONFIG_SPL_STACK 0x187FF0
31 #define CONFIG_SPL_LIBCOMMON_SUPPORT
32 #define CONFIG_SPL_LIBGENERIC_SUPPORT
33 #define CONFIG_SPL_GPIO_SUPPORT
34 #define CONFIG_SPL_MMC_SUPPORT
35 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
36 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
37 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
38 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
39 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
40 #define CONFIG_SYS_ICACHE_OFF
41 #define CONFIG_SYS_DCACHE_OFF
43 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
44 #define CONFIG_MALLOC_F_ADDR 0x182000
45 /* For RAW image gives a error info not panic */
46 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
50 #undef CONFIG_DM_PMIC_PFUZE100
52 #define CONFIG_SYS_I2C
53 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
54 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
55 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
57 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
60 #define CONFIG_POWER_I2C
61 #define CONFIG_POWER_PFUZE100
62 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
65 #define CONFIG_REMAKE_ELF
67 #define CONFIG_BOARD_EARLY_INIT_F
68 #define CONFIG_BOARD_LATE_INIT
70 #undef CONFIG_CMD_EXPORTENV
71 #undef CONFIG_CMD_IMPORTENV
72 #undef CONFIG_CMD_IMLS
74 #undef CONFIG_CMD_CRC32
75 #undef CONFIG_BOOTM_NETBSD
79 #if defined(CONFIG_CMD_NET)
80 #define CONFIG_CMD_PING
81 #define CONFIG_CMD_DHCP
82 #define CONFIG_CMD_MII
84 #define CONFIG_ETHPRIME "FEC"
86 #define CONFIG_FEC_MXC
87 #define CONFIG_FEC_XCV_TYPE RGMII
88 #define CONFIG_FEC_MXC_PHYADDR 0
89 #define FEC_QUIRK_ENET_MAC
91 #define CONFIG_PHY_GIGE
92 #define IMX_FEC_BASE 0x30BE0000
95 #define CONFIG_PHY_ATHEROS
98 #define CONFIG_MFG_ENV_SETTINGS \
99 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
101 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
102 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
103 "g_mass_storage.iSerialNumber=\"\" "\
104 "clk_ignore_unused "\
106 "initrd_addr=0x43800000\0" \
107 "initrd_high=0xffffffff\0" \
108 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
109 /* Initial environment variables */
110 #define CONFIG_EXTRA_ENV_SETTINGS \
111 CONFIG_MFG_ENV_SETTINGS \
112 "script=boot.scr\0" \
114 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \
115 "fdt_addr=0x43000000\0" \
116 "fdt_high=0xffffffffffffffff\0" \
118 "fdt_file=fsl-imx8mq-evk.dtb\0" \
119 "initrd_addr=0x43800000\0" \
120 "initrd_high=0xffffffffffffffff\0" \
121 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
122 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
123 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
124 "mmcautodetect=yes\0" \
125 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
126 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
127 "bootscript=echo Running bootscript from mmc ...; " \
129 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
130 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
131 "mmcboot=echo Booting from mmc ...; " \
133 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
134 "if run loadfdt; then " \
135 "booti ${loadaddr} - ${fdt_addr}; " \
137 "echo WARN: Cannot load the DT; " \
140 "echo wait for boot; " \
142 "netargs=setenv bootargs console=${console} " \
144 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
145 "netboot=echo Booting from net ...; " \
147 "if test ${ip_dyn} = yes; then " \
148 "setenv get_cmd dhcp; " \
150 "setenv get_cmd tftp; " \
152 "${get_cmd} ${loadaddr} ${image}; " \
153 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
154 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
155 "booti ${loadaddr} - ${fdt_addr}; " \
157 "echo WARN: Cannot load the DT; " \
163 #define CONFIG_BOOTCOMMAND \
164 "mmc dev ${mmcdev}; if mmc rescan; then " \
165 "if run loadbootscript; then " \
168 "if run loadimage; then " \
170 "else run netboot; " \
173 "else booti ${loadaddr} - ${fdt_addr}; fi"
175 /* Link Definitions */
176 #define CONFIG_LOADADDR 0x40480000
178 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
180 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
181 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
182 #define CONFIG_SYS_INIT_SP_OFFSET \
183 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
184 #define CONFIG_SYS_INIT_SP_ADDR \
185 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
187 #define CONFIG_ENV_OVERWRITE
188 #define CONFIG_ENV_OFFSET (64 * SZ_64K)
189 #define CONFIG_ENV_SIZE 0x1000
190 #define CONFIG_ENV_IS_IN_MMC
191 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
192 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
194 /* Size of malloc() pool */
195 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
197 #define CONFIG_SYS_SDRAM_BASE 0x40000000
198 #define PHYS_SDRAM 0x40000000
199 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
201 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
202 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
203 (PHYS_SDRAM_SIZE >> 1))
205 #define CONFIG_BAUDRATE 115200
207 #define CONFIG_MXC_UART
208 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
210 /* Monitor Command Prompt */
211 #undef CONFIG_SYS_PROMPT
212 #define CONFIG_SYS_PROMPT "u-boot=> "
213 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
214 #define CONFIG_SYS_CBSIZE 1024
215 #define CONFIG_SYS_MAXARGS 64
216 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
218 sizeof(CONFIG_SYS_PROMPT) + 16)
220 #define CONFIG_IMX_BOOTAUX
222 #define CONFIG_CMD_MMC
223 #define CONFIG_FSL_ESDHC
224 #define CONFIG_FSL_USDHC
226 #define CONFIG_SYS_FSL_USDHC_NUM 2
227 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
229 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
230 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
232 #define CONFIG_MXC_GPIO
234 #define CONFIG_MXC_OCOTP
235 #define CONFIG_CMD_FUSE
238 #define CONFIG_SYS_I2C_SPEED 100000
240 #define CONFIG_OF_SYSTEM_SETUP
242 #ifndef CONFIG_SPL_BUILD
243 #define CONFIG_DM_PMIC