include/configs/imx8mq_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2018 NXP
   4  */
   5
   6 #ifndef __IMX8M_EVK_H
   7 #define __IMX8M_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (64 * SZ_1M)
  14
  15 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  16
  17 #ifdef CONFIG_SPL_BUILD
  18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  19 #define CONFIG_SPL_BSS_START_ADDR      0x00180000
  20 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
  21 #define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000   /* 512 KB */
  22 #define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
  23
  24 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  25 #define CONFIG_MALLOC_F_ADDR            0x182000
  26 /* For RAW image gives a error info not panic */
  27 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  28
  29 #define CONFIG_POWER_PFUZE100
  30 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
  31 #endif
  32
  33 /* ENET Config */
  34 /* ENET1 */
  35 #if defined(CONFIG_CMD_NET)
  36 #define CONFIG_FEC_MXC_PHYADDR          0
  37 #endif
  38
  39 #ifndef CONFIG_SPL_BUILD
  40 #define BOOT_TARGET_DEVICES(func) \
  41        func(MMC, mmc, 0) \
  42        func(MMC, mmc, 1) \
  43        func(DHCP, dhcp, na)
  44
  45 #include <config_distro_bootcmd.h>
  46 #endif
  47
  48 /* Initial environment variables */
  49 #define CONFIG_EXTRA_ENV_SETTINGS               \
  50         BOOTENV \
  51         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  52         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  53         "image=Image\0" \
  54         "console=ttymxc0,115200\0" \
  55         "fdt_addr_r=0x43000000\0"                       \
  56         "boot_fdt=try\0" \
  57         "fdtfile=imx8mq-evk.dtb\0" \
  58         "initrd_addr=0x43800000\0"              \
  59         "bootm_size=0x10000000\0" \
  60         "mmcpart=1\0" \
  61         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  62
  63 /* Link Definitions */
  64
  65 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  66 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
  67
  68
  69 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  70 #define PHYS_SDRAM                      0x40000000
  71 #define PHYS_SDRAM_SIZE                 0xC0000000 /* 3GB DDR */
  72
  73 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(1)
  74
  75 #define CONFIG_SYS_FSL_USDHC_NUM        2
  76 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  77
  78 #endif