1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
15 #define CONFIG_SPL_MAX_SIZE (124 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
20 #ifdef CONFIG_SPL_BUILD
21 #define CONFIG_SPL_STACK 0x187FF0
22 #define CONFIG_SPL_BSS_START_ADDR 0x00180000
23 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
24 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
25 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
26 #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
28 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
29 #define CONFIG_MALLOC_F_ADDR 0x182000
30 /* For RAW image gives a error info not panic */
31 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
35 #define CONFIG_REMAKE_ELF
39 #if defined(CONFIG_CMD_NET)
40 #define CONFIG_ETHPRIME "FEC"
43 #ifndef CONFIG_SPL_BUILD
44 #define BOOT_TARGET_DEVICES(func) \
49 #include <config_distro_bootcmd.h>
52 /* Initial environment variables */
53 #define CONFIG_EXTRA_ENV_SETTINGS \
55 "scriptaddr=0x43500000\0" \
56 "kernel_addr_r=0x40880000\0" \
58 "console=ttymxc0,115200\0" \
59 "fdt_addr=0x43000000\0" \
61 "fdt_file=imx8mq-cm.dtb\0" \
62 "initrd_addr=0x43800000\0" \
63 "bootm_size=0x10000000\0" \
64 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
65 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
67 /* Link Definitions */
68 #define CONFIG_LOADADDR 0x40480000
70 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
72 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
73 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
74 #define CONFIG_SYS_INIT_SP_OFFSET \
75 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
76 #define CONFIG_SYS_INIT_SP_ADDR \
77 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
79 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
81 /* Size of malloc() pool */
82 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
84 #define CONFIG_SYS_SDRAM_BASE 0x40000000
85 #define PHYS_SDRAM 0x40000000
86 #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
88 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
90 /* Monitor Command Prompt */
91 #define CONFIG_SYS_CBSIZE 1024
92 #define CONFIG_SYS_MAXARGS 64
93 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
94 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
95 sizeof(CONFIG_SYS_PROMPT) + 16)
97 #define CONFIG_IMX_BOOTAUX
99 #define CONFIG_SYS_FSL_USDHC_NUM 2
100 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
102 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1