1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2022 Gateworks Corporation
6 #ifndef __IMX8MP_VENICE_H
7 #define __IMX8MP_VENICE_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_SYS_MONITOR_LEN SZ_512K
13 #define CONFIG_SYS_UBOOT_BASE \
14 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
16 #ifdef CONFIG_SPL_BUILD
17 /* For RAW image gives a error info not panic */
20 #define MEM_LAYOUT_ENV_SETTINGS \
21 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
22 "fdt_addr_r=0x50200000\0" \
23 "scriptaddr=0x50280000\0" \
24 "ramdisk_addr_r=0x50300000\0" \
25 "kernel_comp_addr_r=0x40200000\0"
27 /* Enable Distro Boot */
28 #ifndef CONFIG_SPL_BUILD
29 #define BOOT_TARGET_DEVICES(func) \
34 #include <config_distro_bootcmd.h>
39 /* Initial environment variables */
40 #define CONFIG_EXTRA_ENV_SETTINGS \
42 MEM_LAYOUT_ENV_SETTINGS \
44 "bootm_size=0x10000000\0" \
46 "preboot=gsc wd-disable\0" \
47 "console=ttymxc1,115200\0" \
49 "tftpboot $loadaddr $image && " \
50 "setexpr blkcnt $filesize + 0x1ff && " \
51 "setexpr blkcnt $blkcnt / 0x200 && " \
53 "mmc write $loadaddr 0x40 $blkcnt\0" \
55 "if $fsload $fdt_addr_r $dir/$fdt_file1; " \
56 "then echo loaded $fdt_file1; " \
57 "elif $fsload $fdt_addr_r $dir/$fdt_file2; " \
58 "then echo loaded $fdt_file2; " \
59 "elif $fsload $fdt_addr_r $dir/$fdt_file3; " \
60 "then echo loaded $fdt_file3; " \
61 "elif $fsload $fdt_addr_r $dir/$fdt_file4; " \
62 "then echo loaded $fdt_file4; " \
63 "elif $fsload $fdt_addr_r $dir/$fdt_file5; " \
64 "then echo loaded $fdt_file5; " \
67 "setenv fsload tftpboot; " \
68 "run loadfdt && tftpboot $kernel_addr_r $dir/Image && " \
69 "booti $kernel_addr_r - $fdt_addr_r\0" \
71 "tftpboot $loadaddr $image && " \
72 "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \
74 "tftpboot $loadaddr $image && " \
75 "gzwrite mmc $dev $loadaddr $filesize\0" \
76 "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0"
78 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
79 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
81 #define CONFIG_SYS_SDRAM_BASE 0x40000000
83 /* SDRAM configuration */
84 #define PHYS_SDRAM 0x40000000
85 #define PHYS_SDRAM_SIZE SZ_4G
86 #define CONFIG_SYS_BOOTM_LEN SZ_256M
89 #define FEC_QUIRK_ENET_MAC