include/configs/imx8mp_rsb3720.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright 2022 Linaro
   5  */
   6
   7 #ifndef __IMX8MP_RSB3720_H
   8 #define __IMX8MP_RSB3720_H
   9
  10 #include <linux/sizes.h>
  11 #include <linux/stringify.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <config_distro_bootcmd.h>
  14
  15 #define CONFIG_HAS_ETH1
  16
  17 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  18
  19 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
  20 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  21 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  22 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  23
  24 #ifdef CONFIG_SPL_BUILD
  25 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  26 #define CONFIG_SPL_STACK                0x960000
  27 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
  28 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
  29 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  30 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  31
  32 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
  33                                                   * GD_FLG_FULL_MALLOC_INIT \
  34                                                   * set \
  35                                                   */
  36
  37 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  38
  39 #if defined(CONFIG_NAND_BOOT)
  40 #define CONFIG_SPL_NAND_SUPPORT
  41 #define CONFIG_SPL_DMA
  42 #define CONFIG_SPL_NAND_MXS
  43 #define CONFIG_SPL_NAND_BASE
  44 #define CONFIG_SPL_NAND_IDENT
  45 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x4000000 /* Put the FIT out of \
  46                                                    * first 64MB boot area \
  47                                                    */
  48
  49 /* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full
  50  * boot image (not only FIT part) to the mtdpart, so we check both two offsets
  51  */
  52 #define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \
  53         (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400)
  54
  55 #endif
  56
  57 #endif
  58
  59 #define CONFIG_REMAKE_ELF
  60 /* ENET Config */
  61 /* ENET1 */
  62 #if defined(CONFIG_CMD_NET)
  63 #define CONFIG_ETHPRIME                 "eth1" /* Set eqos to primary since we use its MDIO */
  64
  65 #define CONFIG_FEC_XCV_TYPE             RGMII
  66 #define CONFIG_FEC_MXC_PHYADDR          4
  67 #define FEC_QUIRK_ENET_MAC
  68
  69 #define DWC_NET_PHYADDR                 4
  70 #ifdef CONFIG_DWC_ETH_QOS
  71 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
  72 #endif
  73
  74 #define PHY_ANEG_TIMEOUT 20000
  75
  76 #endif
  77
  78 #if CONFIG_IS_ENABLED(CMD_MMC)
  79 # define BOOT_TARGET_MMC(func) \
  80         func(MMC, mmc, 2)      \
  81         func(MMC, mmc, 1)
  82 #else
  83 # define BOOT_TARGET_MMC(func)
  84 #endif
  85
  86 #if CONFIG_IS_ENABLED(CMD_PXE)
  87 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  88 #else
  89 # define BOOT_TARGET_PXE(func)
  90 #endif
  91
  92 #if CONFIG_IS_ENABLED(CMD_DHCP)
  93 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  94 #else
  95 # define BOOT_TARGET_DHCP(func)
  96 #endif
  97
  98 #define BOOT_TARGET_DEVICES(func) \
  99         BOOT_TARGET_MMC(func) \
 100         BOOT_TARGET_PXE(func) \
 101         BOOT_TARGET_DHCP(func)
 102
 103 /* Initial environment variables */
 104 #define CONFIG_EXTRA_ENV_SETTINGS               \
 105         BOOTENV \
 106         "script=boot.scr\0" \
 107         "image=Image\0" \
 108         "splashimage=0x50000000\0" \
 109         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
 110         "fdt_addr=0x43000000\0"                 \
 111         "fdt_addr_r=0x43000000\0"                       \
 112         "boot_fit=no\0" \
 113         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
 114         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
 115         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 116         "initrd_addr=0x43800000\0"              \
 117         "bootm_size=0x10000000\0" \
 118         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 119         "mmcpart=1\0" \
 120         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 121         "mmcautodetect=yes\0" \
 122         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
 123         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 124         "bootscript=echo Running bootscript from mmc ...; " \
 125                 "source\0" \
 126         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 127         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 128         "kernel_addr_r=0x40480000\0" \
 129         "pxefile_addr_r=0x40480000\0" \
 130         "ramdisk_addr_r=0x43800000\0" \
 131         "mmcboot=echo Booting from mmc ...; " \
 132                 "run mmcargs; " \
 133                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 134                         "bootm ${loadaddr}; " \
 135                 "else " \
 136                         "if run loadfdt; then " \
 137                                 "booti ${loadaddr} - ${fdt_addr}; " \
 138                         "else " \
 139                                 "echo WARN: Cannot load the DT; " \
 140                         "fi; " \
 141                 "fi;\0" \
 142         "netargs=setenv bootargs ${jh_clk} console=${console} " \
 143                 "root=/dev/nfs " \
 144                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 145         "netboot=echo Booting from net ...; " \
 146                 "run netargs;  " \
 147                 "if test ${ip_dyn} = yes; then " \
 148                         "setenv get_cmd dhcp; " \
 149                 "else " \
 150                         "setenv get_cmd tftp; " \
 151                 "fi; " \
 152                 "${get_cmd} ${loadaddr} ${image}; " \
 153                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 154                         "bootm ${loadaddr}; " \
 155                 "else " \
 156                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 157                                 "booti ${loadaddr} - ${fdt_addr}; " \
 158                         "else " \
 159                                 "echo WARN: Cannot load the DT; " \
 160                         "fi; " \
 161                 "fi;\0"
 162
 163 /* Link Definitions */
 164 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 165 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 166 #define CONFIG_SYS_INIT_SP_OFFSET \
 167         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 168 #define CONFIG_SYS_INIT_SP_ADDR \
 169         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 170
 171 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 172
 173 /* Totally 6GB or 4G DDR */
 174 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 175 #define PHYS_SDRAM                      0x40000000
 176 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
 177 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 178 #define PHYS_SDRAM_2                    0x100000000
 179 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 180 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 181 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
 182 #define PHYS_SDRAM_2                    0xC0000000
 183 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 184 #endif
 185
 186 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
 187
 188 /* Monitor Command Prompt */
 189 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 190 #define CONFIG_SYS_CBSIZE               2048
 191 #define CONFIG_SYS_MAXARGS              64
 192 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 193 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 194                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 195
 196 #define CONFIG_IMX_BOOTAUX
 197
 198 #define CONFIG_SYS_FSL_USDHC_NUM        2
 199 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 200
 201 #ifdef CONFIG_FSL_FSPI
 202 #define FSL_FSPI_FLASH_SIZE             SZ_32M
 203 #define FSL_FSPI_FLASH_NUM              1
 204 #define FSPI0_BASE_ADDR                 0x30bb0000
 205 #define FSPI0_AMBA_BASE                 0x0
 206 #define CONFIG_FSPI_QUAD_SUPPORT
 207
 208 #define CONFIG_SYS_FSL_FSPI_AHB
 209 #endif
 210
 211 #ifdef CONFIG_NAND_MXS
 212
 213 /* NAND stuff */
 214 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 215 #define CONFIG_SYS_NAND_BASE           0x20000000
 216 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 217 #define CONFIG_SYS_NAND_ONFI_DETECTION
 218 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 219 #endif /* CONFIG_NAND_MXS */
 220
 221 #define CONFIG_SYS_I2C_SPEED            100000
 222
 223 #endif /* __IMX8MP_RSB3720_H */