Convert CONFIG_ETHPRIME to Kconfig
[platform/kernel/u-boot.git] / include / configs / imx8mp_rsb3720.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  * Copyright 2022 Linaro
5  */
6
7 #ifndef __IMX8MP_RSB3720_H
8 #define __IMX8MP_RSB3720_H
9
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
12 #include <asm/arch/imx-regs.h>
13 #include <config_distro_bootcmd.h>
14
15 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
16
17 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
19 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
20
21 #ifdef CONFIG_SPL_BUILD
22 #define CONFIG_SPL_STACK                0x960000
23 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
24 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
25 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
26 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
27
28 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
29                                                   * GD_FLG_FULL_MALLOC_INIT \
30                                                   * set \
31                                                   */
32
33 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
34
35 #if defined(CONFIG_NAND_BOOT)
36 #define CONFIG_SPL_NAND_MXS
37 #endif
38
39 #endif
40
41 /* ENET Config */
42 /* ENET1 */
43 #if defined(CONFIG_CMD_NET)
44 #define CONFIG_FEC_XCV_TYPE             RGMII
45 #define CONFIG_FEC_MXC_PHYADDR          4
46 #define FEC_QUIRK_ENET_MAC
47
48 #define DWC_NET_PHYADDR                 4
49 #ifdef CONFIG_DWC_ETH_QOS
50 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
51 #endif
52
53 #define PHY_ANEG_TIMEOUT 20000
54
55 #endif
56
57 #if CONFIG_IS_ENABLED(CMD_MMC)
58 # define BOOT_TARGET_MMC(func) \
59         func(MMC, mmc, 2)      \
60         func(MMC, mmc, 1)
61 #else
62 # define BOOT_TARGET_MMC(func)
63 #endif
64
65 #if CONFIG_IS_ENABLED(CMD_PXE)
66 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
67 #else
68 # define BOOT_TARGET_PXE(func)
69 #endif
70
71 #if CONFIG_IS_ENABLED(CMD_DHCP)
72 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
73 #else
74 # define BOOT_TARGET_DHCP(func)
75 #endif
76
77 #define BOOT_TARGET_DEVICES(func) \
78         BOOT_TARGET_MMC(func) \
79         BOOT_TARGET_PXE(func) \
80         BOOT_TARGET_DHCP(func)
81
82 /* Initial environment variables */
83 #define CONFIG_EXTRA_ENV_SETTINGS               \
84         BOOTENV \
85         "script=boot.scr\0" \
86         "image=Image\0" \
87         "splashimage=0x50000000\0" \
88         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
89         "fdt_addr=0x43000000\0"                 \
90         "fdt_addr_r=0x43000000\0"                       \
91         "boot_fit=no\0" \
92         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
93         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
94         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
95         "initrd_addr=0x43800000\0"              \
96         "bootm_size=0x10000000\0" \
97         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
98         "mmcpart=1\0" \
99         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
100         "mmcautodetect=yes\0" \
101         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
102         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
103         "bootscript=echo Running bootscript from mmc ...; " \
104                 "source\0" \
105         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
106         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
107         "kernel_addr_r=0x40480000\0" \
108         "pxefile_addr_r=0x40480000\0" \
109         "ramdisk_addr_r=0x43800000\0" \
110         "mmcboot=echo Booting from mmc ...; " \
111                 "run mmcargs; " \
112                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
113                         "bootm ${loadaddr}; " \
114                 "else " \
115                         "if run loadfdt; then " \
116                                 "booti ${loadaddr} - ${fdt_addr}; " \
117                         "else " \
118                                 "echo WARN: Cannot load the DT; " \
119                         "fi; " \
120                 "fi;\0" \
121         "netargs=setenv bootargs ${jh_clk} console=${console} " \
122                 "root=/dev/nfs " \
123                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
124         "netboot=echo Booting from net ...; " \
125                 "run netargs;  " \
126                 "if test ${ip_dyn} = yes; then " \
127                         "setenv get_cmd dhcp; " \
128                 "else " \
129                         "setenv get_cmd tftp; " \
130                 "fi; " \
131                 "${get_cmd} ${loadaddr} ${image}; " \
132                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
133                         "bootm ${loadaddr}; " \
134                 "else " \
135                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
136                                 "booti ${loadaddr} - ${fdt_addr}; " \
137                         "else " \
138                                 "echo WARN: Cannot load the DT; " \
139                         "fi; " \
140                 "fi;\0"
141
142 /* Link Definitions */
143 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
144 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
145 #define CONFIG_SYS_INIT_SP_OFFSET \
146         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
147 #define CONFIG_SYS_INIT_SP_ADDR \
148         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
149
150 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
151
152 /* Totally 6GB or 4G DDR */
153 #define CONFIG_SYS_SDRAM_BASE           0x40000000
154 #define PHYS_SDRAM                      0x40000000
155 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
156 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
157 #define PHYS_SDRAM_2                    0x100000000
158 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
159 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
160 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
161 #define PHYS_SDRAM_2                    0xC0000000
162 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
163 #endif
164
165 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
166
167 /* Monitor Command Prompt */
168 #define CONFIG_SYS_CBSIZE               2048
169 #define CONFIG_SYS_MAXARGS              64
170 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
171 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
172                                         sizeof(CONFIG_SYS_PROMPT) + 16)
173
174 #define CONFIG_SYS_FSL_USDHC_NUM        2
175 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
176
177 #ifdef CONFIG_FSL_FSPI
178 #define FSL_FSPI_FLASH_SIZE             SZ_32M
179 #define FSL_FSPI_FLASH_NUM              1
180 #define FSPI0_BASE_ADDR                 0x30bb0000
181 #define FSPI0_AMBA_BASE                 0x0
182 #define CONFIG_FSPI_QUAD_SUPPORT
183
184 #define CONFIG_SYS_FSL_FSPI_AHB
185 #endif
186
187 #ifdef CONFIG_NAND_MXS
188
189 /* NAND stuff */
190 #define CONFIG_SYS_MAX_NAND_DEVICE     1
191 #define CONFIG_SYS_NAND_BASE           0x20000000
192 #endif /* CONFIG_NAND_MXS */
193
194 #endif /* __IMX8MP_RSB3720_H */