1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright 2022 Linaro
7 #ifndef __IMX8MP_RSB3720_H
8 #define __IMX8MP_RSB3720_H
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
12 #include <asm/arch/imx-regs.h>
13 #include <config_distro_bootcmd.h>
15 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
17 #define CONFIG_SPL_MAX_SIZE (152 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
19 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
21 /* GUIDs for capsule updatable firmware images */
22 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
23 EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
24 0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65)
26 #define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \
27 EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \
28 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
30 #ifdef CONFIG_SPL_BUILD
31 #define CONFIG_SPL_STACK 0x960000
32 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00
33 #define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */
34 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
35 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
37 #define CONFIG_MALLOC_F_ADDR 0x184000 /* malloc f used before \
38 * GD_FLG_FULL_MALLOC_INIT \
42 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
44 #if defined(CONFIG_NAND_BOOT)
45 #define CONFIG_SPL_NAND_MXS
52 #if defined(CONFIG_CMD_NET)
53 #define CONFIG_FEC_MXC_PHYADDR 4
54 #define FEC_QUIRK_ENET_MAC
56 #define DWC_NET_PHYADDR 4
57 #ifdef CONFIG_DWC_ETH_QOS
58 #define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */
61 #define PHY_ANEG_TIMEOUT 20000
65 #if CONFIG_IS_ENABLED(CMD_MMC)
66 # define BOOT_TARGET_MMC(func) \
70 # define BOOT_TARGET_MMC(func)
73 #if CONFIG_IS_ENABLED(CMD_PXE)
74 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
76 # define BOOT_TARGET_PXE(func)
79 #if CONFIG_IS_ENABLED(CMD_DHCP)
80 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
82 # define BOOT_TARGET_DHCP(func)
85 #define BOOT_TARGET_DEVICES(func) \
86 BOOT_TARGET_MMC(func) \
87 BOOT_TARGET_PXE(func) \
88 BOOT_TARGET_DHCP(func)
90 /* Initial environment variables */
91 #define CONFIG_EXTRA_ENV_SETTINGS \
95 "splashimage=0x50000000\0" \
96 "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
97 "fdt_addr=0x43000000\0" \
98 "fdt_addr_r=0x43000000\0" \
100 "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
101 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
102 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
103 "initrd_addr=0x43800000\0" \
104 "bootm_size=0x10000000\0" \
105 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
107 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
108 "mmcautodetect=yes\0" \
109 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
110 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
111 "bootscript=echo Running bootscript from mmc ...; " \
113 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
114 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
115 "kernel_addr_r=0x40480000\0" \
116 "pxefile_addr_r=0x40480000\0" \
117 "ramdisk_addr_r=0x43800000\0" \
118 "mmcboot=echo Booting from mmc ...; " \
120 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
121 "bootm ${loadaddr}; " \
123 "if run loadfdt; then " \
124 "booti ${loadaddr} - ${fdt_addr}; " \
126 "echo WARN: Cannot load the DT; " \
129 "netargs=setenv bootargs ${jh_clk} console=${console} " \
131 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
132 "netboot=echo Booting from net ...; " \
134 "if test ${ip_dyn} = yes; then " \
135 "setenv get_cmd dhcp; " \
137 "setenv get_cmd tftp; " \
139 "${get_cmd} ${loadaddr} ${image}; " \
140 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
141 "bootm ${loadaddr}; " \
143 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
144 "booti ${loadaddr} - ${fdt_addr}; " \
146 "echo WARN: Cannot load the DT; " \
150 /* Link Definitions */
151 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
152 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
153 #define CONFIG_SYS_INIT_SP_OFFSET \
154 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
155 #define CONFIG_SYS_INIT_SP_ADDR \
156 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
159 /* Totally 6GB or 4G DDR */
160 #define CONFIG_SYS_SDRAM_BASE 0x40000000
161 #define PHYS_SDRAM 0x40000000
162 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
163 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */
164 #define PHYS_SDRAM_2 0x100000000
165 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
166 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
167 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GB */
168 #define PHYS_SDRAM_2 0xC0000000
169 #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
172 #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
174 /* Monitor Command Prompt */
175 #define CONFIG_SYS_CBSIZE 2048
176 #define CONFIG_SYS_MAXARGS 64
177 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
178 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
179 sizeof(CONFIG_SYS_PROMPT) + 16)
181 #define CONFIG_SYS_FSL_USDHC_NUM 2
182 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
184 #ifdef CONFIG_FSL_FSPI
185 #define FSL_FSPI_FLASH_SIZE SZ_32M
186 #define FSL_FSPI_FLASH_NUM 1
187 #define FSPI0_BASE_ADDR 0x30bb0000
188 #define FSPI0_AMBA_BASE 0x0
189 #define CONFIG_FSPI_QUAD_SUPPORT
191 #define CONFIG_SYS_FSL_FSPI_AHB
194 #ifdef CONFIG_NAND_MXS
197 #define CONFIG_SYS_MAX_NAND_DEVICE 1
198 #define CONFIG_SYS_NAND_BASE 0x20000000
199 #endif /* CONFIG_NAND_MXS */
201 #endif /* __IMX8MP_RSB3720_H */