include/configs/imx8mp_rsb3720.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright 2022 Linaro
   5  */
   6
   7 #ifndef __IMX8MP_RSB3720_H
   8 #define __IMX8MP_RSB3720_H
   9
  10 #include <linux/sizes.h>
  11 #include <linux/stringify.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <config_distro_bootcmd.h>
  14
  15 #define CONFIG_HAS_ETH1
  16
  17 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  18
  19 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
  20 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  21 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  22
  23 #ifdef CONFIG_SPL_BUILD
  24 #define CONFIG_SPL_STACK                0x960000
  25 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
  26 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
  27 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  28 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  29
  30 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
  31                                                   * GD_FLG_FULL_MALLOC_INIT \
  32                                                   * set \
  33                                                   */
  34
  35 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  36
  37 #if defined(CONFIG_NAND_BOOT)
  38 #define CONFIG_SPL_NAND_MXS
  39 #endif
  40
  41 #endif
  42
  43 /* ENET Config */
  44 /* ENET1 */
  45 #if defined(CONFIG_CMD_NET)
  46 #define CONFIG_ETHPRIME                 "eth1" /* Set eqos to primary since we use its MDIO */
  47
  48 #define CONFIG_FEC_XCV_TYPE             RGMII
  49 #define CONFIG_FEC_MXC_PHYADDR          4
  50 #define FEC_QUIRK_ENET_MAC
  51
  52 #define DWC_NET_PHYADDR                 4
  53 #ifdef CONFIG_DWC_ETH_QOS
  54 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
  55 #endif
  56
  57 #define PHY_ANEG_TIMEOUT 20000
  58
  59 #endif
  60
  61 #if CONFIG_IS_ENABLED(CMD_MMC)
  62 # define BOOT_TARGET_MMC(func) \
  63         func(MMC, mmc, 2)      \
  64         func(MMC, mmc, 1)
  65 #else
  66 # define BOOT_TARGET_MMC(func)
  67 #endif
  68
  69 #if CONFIG_IS_ENABLED(CMD_PXE)
  70 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  71 #else
  72 # define BOOT_TARGET_PXE(func)
  73 #endif
  74
  75 #if CONFIG_IS_ENABLED(CMD_DHCP)
  76 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  77 #else
  78 # define BOOT_TARGET_DHCP(func)
  79 #endif
  80
  81 #define BOOT_TARGET_DEVICES(func) \
  82         BOOT_TARGET_MMC(func) \
  83         BOOT_TARGET_PXE(func) \
  84         BOOT_TARGET_DHCP(func)
  85
  86 /* Initial environment variables */
  87 #define CONFIG_EXTRA_ENV_SETTINGS               \
  88         BOOTENV \
  89         "script=boot.scr\0" \
  90         "image=Image\0" \
  91         "splashimage=0x50000000\0" \
  92         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
  93         "fdt_addr=0x43000000\0"                 \
  94         "fdt_addr_r=0x43000000\0"                       \
  95         "boot_fit=no\0" \
  96         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
  97         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  98         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  99         "initrd_addr=0x43800000\0"              \
 100         "bootm_size=0x10000000\0" \
 101         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 102         "mmcpart=1\0" \
 103         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 104         "mmcautodetect=yes\0" \
 105         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
 106         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 107         "bootscript=echo Running bootscript from mmc ...; " \
 108                 "source\0" \
 109         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 110         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 111         "kernel_addr_r=0x40480000\0" \
 112         "pxefile_addr_r=0x40480000\0" \
 113         "ramdisk_addr_r=0x43800000\0" \
 114         "mmcboot=echo Booting from mmc ...; " \
 115                 "run mmcargs; " \
 116                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 117                         "bootm ${loadaddr}; " \
 118                 "else " \
 119                         "if run loadfdt; then " \
 120                                 "booti ${loadaddr} - ${fdt_addr}; " \
 121                         "else " \
 122                                 "echo WARN: Cannot load the DT; " \
 123                         "fi; " \
 124                 "fi;\0" \
 125         "netargs=setenv bootargs ${jh_clk} console=${console} " \
 126                 "root=/dev/nfs " \
 127                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 128         "netboot=echo Booting from net ...; " \
 129                 "run netargs;  " \
 130                 "if test ${ip_dyn} = yes; then " \
 131                         "setenv get_cmd dhcp; " \
 132                 "else " \
 133                         "setenv get_cmd tftp; " \
 134                 "fi; " \
 135                 "${get_cmd} ${loadaddr} ${image}; " \
 136                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 137                         "bootm ${loadaddr}; " \
 138                 "else " \
 139                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 140                                 "booti ${loadaddr} - ${fdt_addr}; " \
 141                         "else " \
 142                                 "echo WARN: Cannot load the DT; " \
 143                         "fi; " \
 144                 "fi;\0"
 145
 146 /* Link Definitions */
 147 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 148 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 149 #define CONFIG_SYS_INIT_SP_OFFSET \
 150         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 151 #define CONFIG_SYS_INIT_SP_ADDR \
 152         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 153
 154 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 155
 156 /* Totally 6GB or 4G DDR */
 157 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 158 #define PHYS_SDRAM                      0x40000000
 159 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
 160 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 161 #define PHYS_SDRAM_2                    0x100000000
 162 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 163 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 164 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
 165 #define PHYS_SDRAM_2                    0xC0000000
 166 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 167 #endif
 168
 169 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
 170
 171 /* Monitor Command Prompt */
 172 #define CONFIG_SYS_CBSIZE               2048
 173 #define CONFIG_SYS_MAXARGS              64
 174 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 175 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 176                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 177
 178 #define CONFIG_SYS_FSL_USDHC_NUM        2
 179 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 180
 181 #ifdef CONFIG_FSL_FSPI
 182 #define FSL_FSPI_FLASH_SIZE             SZ_32M
 183 #define FSL_FSPI_FLASH_NUM              1
 184 #define FSPI0_BASE_ADDR                 0x30bb0000
 185 #define FSPI0_AMBA_BASE                 0x0
 186 #define CONFIG_FSPI_QUAD_SUPPORT
 187
 188 #define CONFIG_SYS_FSL_FSPI_AHB
 189 #endif
 190
 191 #ifdef CONFIG_NAND_MXS
 192
 193 /* NAND stuff */
 194 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 195 #define CONFIG_SYS_NAND_BASE           0x20000000
 196 #endif /* CONFIG_NAND_MXS */
 197
 198 #endif /* __IMX8MP_RSB3720_H */