include/configs/imx8mp_rsb3720.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright 2022 Linaro
   5  */
   6
   7 #ifndef __IMX8MP_RSB3720_H
   8 #define __IMX8MP_RSB3720_H
   9
  10 #include <linux/sizes.h>
  11 #include <linux/stringify.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <config_distro_bootcmd.h>
  14
  15 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  16
  17 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
  18 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  19 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  20
  21 #ifdef CONFIG_SPL_BUILD
  22 #define CONFIG_SPL_STACK                0x960000
  23 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
  24 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
  25 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  26 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  27
  28 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
  29                                                   * GD_FLG_FULL_MALLOC_INIT \
  30                                                   * set \
  31                                                   */
  32
  33 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  34
  35 #if defined(CONFIG_NAND_BOOT)
  36 #define CONFIG_SPL_NAND_MXS
  37 #endif
  38
  39 #endif
  40
  41 /* ENET Config */
  42 /* ENET1 */
  43 #if defined(CONFIG_CMD_NET)
  44 #define CONFIG_FEC_MXC_PHYADDR          4
  45 #define FEC_QUIRK_ENET_MAC
  46
  47 #define DWC_NET_PHYADDR                 4
  48 #ifdef CONFIG_DWC_ETH_QOS
  49 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
  50 #endif
  51
  52 #define PHY_ANEG_TIMEOUT 20000
  53
  54 #endif
  55
  56 #if CONFIG_IS_ENABLED(CMD_MMC)
  57 # define BOOT_TARGET_MMC(func) \
  58         func(MMC, mmc, 2)      \
  59         func(MMC, mmc, 1)
  60 #else
  61 # define BOOT_TARGET_MMC(func)
  62 #endif
  63
  64 #if CONFIG_IS_ENABLED(CMD_PXE)
  65 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  66 #else
  67 # define BOOT_TARGET_PXE(func)
  68 #endif
  69
  70 #if CONFIG_IS_ENABLED(CMD_DHCP)
  71 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  72 #else
  73 # define BOOT_TARGET_DHCP(func)
  74 #endif
  75
  76 #define BOOT_TARGET_DEVICES(func) \
  77         BOOT_TARGET_MMC(func) \
  78         BOOT_TARGET_PXE(func) \
  79         BOOT_TARGET_DHCP(func)
  80
  81 /* Initial environment variables */
  82 #define CONFIG_EXTRA_ENV_SETTINGS               \
  83         BOOTENV \
  84         "script=boot.scr\0" \
  85         "image=Image\0" \
  86         "splashimage=0x50000000\0" \
  87         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
  88         "fdt_addr=0x43000000\0"                 \
  89         "fdt_addr_r=0x43000000\0"                       \
  90         "boot_fit=no\0" \
  91         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
  92         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  93         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  94         "initrd_addr=0x43800000\0"              \
  95         "bootm_size=0x10000000\0" \
  96         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  97         "mmcpart=1\0" \
  98         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  99         "mmcautodetect=yes\0" \
 100         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
 101         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 102         "bootscript=echo Running bootscript from mmc ...; " \
 103                 "source\0" \
 104         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 105         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 106         "kernel_addr_r=0x40480000\0" \
 107         "pxefile_addr_r=0x40480000\0" \
 108         "ramdisk_addr_r=0x43800000\0" \
 109         "mmcboot=echo Booting from mmc ...; " \
 110                 "run mmcargs; " \
 111                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 112                         "bootm ${loadaddr}; " \
 113                 "else " \
 114                         "if run loadfdt; then " \
 115                                 "booti ${loadaddr} - ${fdt_addr}; " \
 116                         "else " \
 117                                 "echo WARN: Cannot load the DT; " \
 118                         "fi; " \
 119                 "fi;\0" \
 120         "netargs=setenv bootargs ${jh_clk} console=${console} " \
 121                 "root=/dev/nfs " \
 122                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 123         "netboot=echo Booting from net ...; " \
 124                 "run netargs;  " \
 125                 "if test ${ip_dyn} = yes; then " \
 126                         "setenv get_cmd dhcp; " \
 127                 "else " \
 128                         "setenv get_cmd tftp; " \
 129                 "fi; " \
 130                 "${get_cmd} ${loadaddr} ${image}; " \
 131                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 132                         "bootm ${loadaddr}; " \
 133                 "else " \
 134                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 135                                 "booti ${loadaddr} - ${fdt_addr}; " \
 136                         "else " \
 137                                 "echo WARN: Cannot load the DT; " \
 138                         "fi; " \
 139                 "fi;\0"
 140
 141 /* Link Definitions */
 142 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 143 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 144 #define CONFIG_SYS_INIT_SP_OFFSET \
 145         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 146 #define CONFIG_SYS_INIT_SP_ADDR \
 147         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 148
 149 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 150
 151 /* Totally 6GB or 4G DDR */
 152 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 153 #define PHYS_SDRAM                      0x40000000
 154 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
 155 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 156 #define PHYS_SDRAM_2                    0x100000000
 157 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 158 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 159 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
 160 #define PHYS_SDRAM_2                    0xC0000000
 161 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 162 #endif
 163
 164 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
 165
 166 /* Monitor Command Prompt */
 167 #define CONFIG_SYS_CBSIZE               2048
 168 #define CONFIG_SYS_MAXARGS              64
 169 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 170 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 171                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 172
 173 #define CONFIG_SYS_FSL_USDHC_NUM        2
 174 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 175
 176 #ifdef CONFIG_FSL_FSPI
 177 #define FSL_FSPI_FLASH_SIZE             SZ_32M
 178 #define FSL_FSPI_FLASH_NUM              1
 179 #define FSPI0_BASE_ADDR                 0x30bb0000
 180 #define FSPI0_AMBA_BASE                 0x0
 181 #define CONFIG_FSPI_QUAD_SUPPORT
 182
 183 #define CONFIG_SYS_FSL_FSPI_AHB
 184 #endif
 185
 186 #ifdef CONFIG_NAND_MXS
 187
 188 /* NAND stuff */
 189 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 190 #define CONFIG_SYS_NAND_BASE           0x20000000
 191 #endif /* CONFIG_NAND_MXS */
 192
 193 #endif /* __IMX8MP_RSB3720_H */