include/configs/imx8mp_rsb3720.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright 2022 Linaro
   5  */
   6
   7 #ifndef __IMX8MP_RSB3720_H
   8 #define __IMX8MP_RSB3720_H
   9
  10 #include <linux/sizes.h>
  11 #include <linux/stringify.h>
  12 #include <asm/arch/imx-regs.h>
  13 #include <config_distro_bootcmd.h>
  14
  15 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  16 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  17
  18 /* GUIDs for capsule updatable firmware images */
  19 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \
  20         EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \
  21                  0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65)
  22
  23 #define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \
  24         EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \
  25                  0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9)
  26
  27 #ifdef CONFIG_SPL_BUILD
  28 #define CONFIG_MALLOC_F_ADDR            0x184000 /* malloc f used before \
  29                                                   * GD_FLG_FULL_MALLOC_INIT \
  30                                                   * set \
  31                                                   */
  32
  33
  34 #if defined(CONFIG_NAND_BOOT)
  35 #define CONFIG_SPL_NAND_MXS
  36 #endif
  37
  38 #endif
  39
  40 /* ENET Config */
  41 /* ENET1 */
  42 #if defined(CONFIG_CMD_NET)
  43 #define CONFIG_FEC_MXC_PHYADDR          4
  44
  45 #define DWC_NET_PHYADDR                 4
  46 #ifdef CONFIG_DWC_ETH_QOS
  47 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
  48 #endif
  49
  50 #define PHY_ANEG_TIMEOUT 20000
  51
  52 #endif
  53
  54 #if CONFIG_IS_ENABLED(CMD_MMC)
  55 # define BOOT_TARGET_MMC(func) \
  56         func(MMC, mmc, 2)      \
  57         func(MMC, mmc, 1)
  58 #else
  59 # define BOOT_TARGET_MMC(func)
  60 #endif
  61
  62 #if CONFIG_IS_ENABLED(CMD_PXE)
  63 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  64 #else
  65 # define BOOT_TARGET_PXE(func)
  66 #endif
  67
  68 #if CONFIG_IS_ENABLED(CMD_DHCP)
  69 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  70 #else
  71 # define BOOT_TARGET_DHCP(func)
  72 #endif
  73
  74 #define BOOT_TARGET_DEVICES(func) \
  75         BOOT_TARGET_MMC(func) \
  76         BOOT_TARGET_PXE(func) \
  77         BOOT_TARGET_DHCP(func)
  78
  79 /* Initial environment variables */
  80 #define CONFIG_EXTRA_ENV_SETTINGS               \
  81         BOOTENV \
  82         "script=boot.scr\0" \
  83         "image=Image\0" \
  84         "splashimage=0x50000000\0" \
  85         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
  86         "fdt_addr=0x43000000\0"                 \
  87         "fdt_addr_r=0x43000000\0"                       \
  88         "boot_fit=no\0" \
  89         "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \
  90         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  91         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  92         "initrd_addr=0x43800000\0"              \
  93         "bootm_size=0x10000000\0" \
  94         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  95         "mmcpart=1\0" \
  96         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  97         "mmcautodetect=yes\0" \
  98         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
  99         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 100         "bootscript=echo Running bootscript from mmc ...; " \
 101                 "source\0" \
 102         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
 103         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
 104         "kernel_addr_r=0x40480000\0" \
 105         "pxefile_addr_r=0x40480000\0" \
 106         "ramdisk_addr_r=0x43800000\0" \
 107         "mmcboot=echo Booting from mmc ...; " \
 108                 "run mmcargs; " \
 109                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 110                         "bootm ${loadaddr}; " \
 111                 "else " \
 112                         "if run loadfdt; then " \
 113                                 "booti ${loadaddr} - ${fdt_addr}; " \
 114                         "else " \
 115                                 "echo WARN: Cannot load the DT; " \
 116                         "fi; " \
 117                 "fi;\0" \
 118         "netargs=setenv bootargs ${jh_clk} console=${console} " \
 119                 "root=/dev/nfs " \
 120                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 121         "netboot=echo Booting from net ...; " \
 122                 "run netargs;  " \
 123                 "if test ${ip_dyn} = yes; then " \
 124                         "setenv get_cmd dhcp; " \
 125                 "else " \
 126                         "setenv get_cmd tftp; " \
 127                 "fi; " \
 128                 "${get_cmd} ${loadaddr} ${image}; " \
 129                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 130                         "bootm ${loadaddr}; " \
 131                 "else " \
 132                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 133                                 "booti ${loadaddr} - ${fdt_addr}; " \
 134                         "else " \
 135                                 "echo WARN: Cannot load the DT; " \
 136                         "fi; " \
 137                 "fi;\0"
 138
 139 /* Link Definitions */
 140 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 141 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 142
 143
 144 /* Totally 6GB or 4G DDR */
 145 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 146 #define PHYS_SDRAM                      0x40000000
 147 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G)
 148 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 149 #define PHYS_SDRAM_2                    0x100000000
 150 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 151 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)
 152 #define PHYS_SDRAM_SIZE                 0x80000000      /* 2 GB */
 153 #define PHYS_SDRAM_2                    0xC0000000
 154 #define PHYS_SDRAM_2_SIZE               0x80000000      /* 2 GB */
 155 #endif
 156
 157 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
 158
 159 #define CONFIG_SYS_FSL_USDHC_NUM        2
 160 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 161
 162 #ifdef CONFIG_FSL_FSPI
 163 #define FSL_FSPI_FLASH_SIZE             SZ_32M
 164 #define FSL_FSPI_FLASH_NUM              1
 165 #define FSPI0_BASE_ADDR                 0x30bb0000
 166 #define FSPI0_AMBA_BASE                 0x0
 167 #define CONFIG_FSPI_QUAD_SUPPORT
 168
 169 #define CONFIG_SYS_FSL_FSPI_AHB
 170 #endif
 171
 172 #ifdef CONFIG_NAND_MXS
 173
 174 /* NAND stuff */
 175 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 176 #define CONFIG_SYS_NAND_BASE           0x20000000
 177 #endif /* CONFIG_NAND_MXS */
 178
 179 #endif /* __IMX8MP_RSB3720_H */