Merge branch 'next'
[platform/kernel/u-boot.git] / include / configs / imx8mp_evk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  */
5
6 #ifndef __IMX8MP_EVK_H
7 #define __IMX8MP_EVK_H
8
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12
13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
14
15 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
19 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
20
21 #ifdef CONFIG_SPL_BUILD
22 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
23 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
24 #define CONFIG_SPL_STACK                0x960000
25 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
26 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
27 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
28 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
29 #define CONFIG_SYS_ICACHE_OFF
30 #define CONFIG_SYS_DCACHE_OFF
31
32 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
33
34 #undef CONFIG_DM_MMC
35 #undef CONFIG_DM_PMIC
36 #undef CONFIG_DM_PMIC_PFUZE100
37
38 #define CONFIG_POWER
39 #define CONFIG_POWER_I2C
40 #define CONFIG_POWER_PCA9450
41
42 #undef CONFIG_DM_I2C
43 #define CONFIG_SYS_I2C
44
45 #endif
46
47 /* Initial environment variables */
48 #define CONFIG_EXTRA_ENV_SETTINGS               \
49         "script=boot.scr\0" \
50         "image=Image\0" \
51         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
52         "fdt_addr=0x43000000\0"                 \
53         "boot_fdt=try\0" \
54         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
55         "initrd_addr=0x43800000\0"              \
56         "bootm_size=0x10000000\0" \
57         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
58         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
59         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
60         "mmcautodetect=yes\0" \
61         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
62         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
63         "bootscript=echo Running bootscript from mmc ...; " \
64                 "source\0" \
65         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
66         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
67         "mmcboot=echo Booting from mmc ...; " \
68                 "run mmcargs; " \
69                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
70                         "if run loadfdt; then " \
71                                 "booti ${loadaddr} - ${fdt_addr}; " \
72                         "else " \
73                                 "echo WARN: Cannot load the DT; " \
74                         "fi; " \
75                 "else " \
76                         "echo wait for boot; " \
77                 "fi;\0" \
78         "netargs=setenv bootargs ${jh_clk} console=${console} " \
79                 "root=/dev/nfs " \
80                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
81         "netboot=echo Booting from net ...; " \
82                 "run netargs;  " \
83                 "if test ${ip_dyn} = yes; then " \
84                         "setenv get_cmd dhcp; " \
85                 "else " \
86                         "setenv get_cmd tftp; " \
87                 "fi; " \
88                 "${get_cmd} ${loadaddr} ${image}; " \
89                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
90                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
91                                 "booti ${loadaddr} - ${fdt_addr}; " \
92                         "else " \
93                                 "echo WARN: Cannot load the DT; " \
94                         "fi; " \
95                 "else " \
96                         "booti; " \
97                 "fi;\0"
98
99 #define CONFIG_BOOTCOMMAND \
100            "mmc dev ${mmcdev}; if mmc rescan; then " \
101                    "if run loadbootscript; then " \
102                            "run bootscript; " \
103                    "else " \
104                            "if run loadimage; then " \
105                                    "run mmcboot; " \
106                            "else run netboot; " \
107                            "fi; " \
108                    "fi; " \
109            "else booti ${loadaddr} - ${fdt_addr}; fi"
110
111 /* Link Definitions */
112 #define CONFIG_LOADADDR                 0x40480000
113
114 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
115
116 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
117 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
118 #define CONFIG_SYS_INIT_SP_OFFSET \
119         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
120 #define CONFIG_SYS_INIT_SP_ADDR \
121         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
122
123 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
124
125 /* Size of malloc() pool */
126 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
127
128 /* Totally 6GB DDR */
129 #define CONFIG_SYS_SDRAM_BASE           0x40000000
130 #define PHYS_SDRAM                      0x40000000
131 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
132 #define PHYS_SDRAM_2                    0x100000000
133 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
134
135 #define CONFIG_MXC_UART_BASE            UART2_BASE_ADDR
136
137 /* Monitor Command Prompt */
138 #define CONFIG_SYS_CBSIZE               2048
139 #define CONFIG_SYS_MAXARGS              64
140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
141 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
142                                         sizeof(CONFIG_SYS_PROMPT) + 16)
143
144 #define CONFIG_FSL_USDHC
145
146 #define CONFIG_SYS_FSL_USDHC_NUM        2
147 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
148
149 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
150
151 #define CONFIG_SYS_I2C_SPEED            100000
152
153 #endif