include/configs/imx8mp_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MP_EVK_H
   7 #define __IMX8MP_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  14
  15 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  16 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  17
  18 #ifdef CONFIG_SPL_BUILD
  19 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  20
  21
  22 #define CONFIG_POWER_PCA9450
  23
  24 #endif
  25
  26 #if defined(CONFIG_CMD_NET)
  27 #define CONFIG_FEC_MXC_PHYADDR          1
  28
  29 #define DWC_NET_PHYADDR                 1
  30
  31 #define PHY_ANEG_TIMEOUT 20000
  32
  33 #endif
  34
  35 #ifndef CONFIG_SPL_BUILD
  36 #define BOOT_TARGET_DEVICES(func) \
  37        func(MMC, mmc, 1) \
  38        func(MMC, mmc, 2)
  39
  40 #include <config_distro_bootcmd.h>
  41 #endif
  42
  43 /* Initial environment variables */
  44 #define CONFIG_EXTRA_ENV_SETTINGS               \
  45         BOOTENV \
  46         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  47         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  48         "image=Image\0" \
  49         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
  50         "fdt_addr_r=0x43000000\0"                       \
  51         "boot_fdt=try\0" \
  52         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  53         "initrd_addr=0x43800000\0"              \
  54         "bootm_size=0x10000000\0" \
  55         "mmcpart=1\0" \
  56         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  57
  58 /* Link Definitions */
  59
  60 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  61 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
  62
  63
  64 /* Totally 6GB DDR */
  65 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  66 #define PHYS_SDRAM                      0x40000000
  67 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
  68 #define PHYS_SDRAM_2                    0x100000000
  69 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
  70
  71 #endif