1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #ifdef CONFIG_SECURE_BOOT
14 #define CONFIG_CSF_SIZE 0x2000 /* 8K region */
17 #define CONFIG_SPL_MAX_SIZE (152 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
20 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
21 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
22 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
24 #ifdef CONFIG_SPL_BUILD
25 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
26 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
27 #define CONFIG_SPL_STACK 0x960000
28 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00
29 #define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */
30 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
31 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
32 #define CONFIG_SYS_ICACHE_OFF
33 #define CONFIG_SYS_DCACHE_OFF
35 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
39 #undef CONFIG_DM_PMIC_PFUZE100
42 #define CONFIG_POWER_I2C
43 #define CONFIG_POWER_PCA9450
46 #define CONFIG_SYS_I2C
50 /* Initial environment variables */
51 #define CONFIG_EXTRA_ENV_SETTINGS \
54 "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
55 "fdt_addr=0x43000000\0" \
56 "fdt_high=0xffffffffffffffff\0" \
58 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
59 "initrd_addr=0x43800000\0" \
60 "initrd_high=0xffffffffffffffff\0" \
61 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
62 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
63 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
64 "mmcautodetect=yes\0" \
65 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
66 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
67 "bootscript=echo Running bootscript from mmc ...; " \
69 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
70 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
71 "mmcboot=echo Booting from mmc ...; " \
73 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
74 "if run loadfdt; then " \
75 "booti ${loadaddr} - ${fdt_addr}; " \
77 "echo WARN: Cannot load the DT; " \
80 "echo wait for boot; " \
82 "netargs=setenv bootargs ${jh_clk} console=${console} " \
84 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
85 "netboot=echo Booting from net ...; " \
87 "if test ${ip_dyn} = yes; then " \
88 "setenv get_cmd dhcp; " \
90 "setenv get_cmd tftp; " \
92 "${get_cmd} ${loadaddr} ${image}; " \
93 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
94 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
95 "booti ${loadaddr} - ${fdt_addr}; " \
97 "echo WARN: Cannot load the DT; " \
103 #define CONFIG_BOOTCOMMAND \
104 "mmc dev ${mmcdev}; if mmc rescan; then " \
105 "if run loadbootscript; then " \
108 "if run loadimage; then " \
110 "else run netboot; " \
113 "else booti ${loadaddr} - ${fdt_addr}; fi"
115 /* Link Definitions */
116 #define CONFIG_LOADADDR 0x40480000
118 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
120 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
121 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
122 #define CONFIG_SYS_INIT_SP_OFFSET \
123 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
124 #define CONFIG_SYS_INIT_SP_ADDR \
125 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
127 #define CONFIG_ENV_OVERWRITE
128 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
129 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
131 /* Size of malloc() pool */
132 #define CONFIG_SYS_MALLOC_LEN SZ_32M
134 /* Totally 6GB DDR */
135 #define CONFIG_SYS_SDRAM_BASE 0x40000000
136 #define PHYS_SDRAM 0x40000000
137 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */
138 #define PHYS_SDRAM_2 0x100000000
139 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
141 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
143 /* Monitor Command Prompt */
144 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
145 #define CONFIG_SYS_CBSIZE 2048
146 #define CONFIG_SYS_MAXARGS 64
147 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
148 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
149 sizeof(CONFIG_SYS_PROMPT) + 16)
151 #define CONFIG_FSL_USDHC
153 #define CONFIG_SYS_FSL_USDHC_NUM 2
154 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
156 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
158 #define CONFIG_SYS_I2C_SPEED 100000