include/configs/imx8mp_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MP_EVK_H
   7 #define __IMX8MP_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <asm/arch/imx-regs.h>
  11
  12 #ifdef CONFIG_SECURE_BOOT
  13 #define CONFIG_CSF_SIZE                 0x2000 /* 8K region */
  14 #endif
  15
  16 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
  17 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  20 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  21 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  22
  23 #ifdef CONFIG_SPL_BUILD
  24 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  25 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  26 #define CONFIG_SPL_STACK                0x990000
  27 #define CONFIG_SPL_BSS_START_ADDR      0x0095e000
  28 #define CONFIG_SPL_BSS_MAX_SIZE        0x2000   /* 8 KB */
  29 #define CONFIG_SYS_SPL_MALLOC_START    0x42200000
  30 #define CONFIG_SYS_SPL_MALLOC_SIZE     SZ_512K  /* 512 KB */
  31 #define CONFIG_SYS_ICACHE_OFF
  32 #define CONFIG_SYS_DCACHE_OFF
  33
  34 #define CONFIG_MALLOC_F_ADDR            0x940000
  35
  36 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  37
  38 #undef CONFIG_DM_MMC
  39 #undef CONFIG_DM_PMIC
  40 #undef CONFIG_DM_PMIC_PFUZE100
  41
  42 #define CONFIG_POWER
  43 #define CONFIG_POWER_I2C
  44 #define CONFIG_POWER_PCA9450
  45
  46 #undef CONFIG_DM_I2C
  47 #define CONFIG_SYS_I2C
  48
  49 #endif
  50
  51 /* Initial environment variables */
  52 #define CONFIG_EXTRA_ENV_SETTINGS               \
  53         "script=boot.scr\0" \
  54         "image=Image\0" \
  55         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
  56         "fdt_addr=0x43000000\0"                 \
  57         "fdt_high=0xffffffffffffffff\0"         \
  58         "boot_fdt=try\0" \
  59         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  60         "initrd_addr=0x43800000\0"              \
  61         "initrd_high=0xffffffffffffffff\0" \
  62         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  63         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  64         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  65         "mmcautodetect=yes\0" \
  66         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
  67         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  68         "bootscript=echo Running bootscript from mmc ...; " \
  69                 "source\0" \
  70         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  71         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  72         "mmcboot=echo Booting from mmc ...; " \
  73                 "run mmcargs; " \
  74                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  75                         "if run loadfdt; then " \
  76                                 "booti ${loadaddr} - ${fdt_addr}; " \
  77                         "else " \
  78                                 "echo WARN: Cannot load the DT; " \
  79                         "fi; " \
  80                 "else " \
  81                         "echo wait for boot; " \
  82                 "fi;\0" \
  83         "netargs=setenv bootargs ${jh_clk} console=${console} " \
  84                 "root=/dev/nfs " \
  85                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  86         "netboot=echo Booting from net ...; " \
  87                 "run netargs;  " \
  88                 "if test ${ip_dyn} = yes; then " \
  89                         "setenv get_cmd dhcp; " \
  90                 "else " \
  91                         "setenv get_cmd tftp; " \
  92                 "fi; " \
  93                 "${get_cmd} ${loadaddr} ${image}; " \
  94                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  95                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  96                                 "booti ${loadaddr} - ${fdt_addr}; " \
  97                         "else " \
  98                                 "echo WARN: Cannot load the DT; " \
  99                         "fi; " \
 100                 "else " \
 101                         "booti; " \
 102                 "fi;\0"
 103
 104 #define CONFIG_BOOTCOMMAND \
 105            "mmc dev ${mmcdev}; if mmc rescan; then " \
 106                    "if run loadbootscript; then " \
 107                            "run bootscript; " \
 108                    "else " \
 109                            "if run loadimage; then " \
 110                                    "run mmcboot; " \
 111                            "else run netboot; " \
 112                            "fi; " \
 113                    "fi; " \
 114            "else booti ${loadaddr} - ${fdt_addr}; fi"
 115
 116 /* Link Definitions */
 117 #define CONFIG_LOADADDR                 0x40480000
 118
 119 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 120
 121 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 122 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 123 #define CONFIG_SYS_INIT_SP_OFFSET \
 124         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 125 #define CONFIG_SYS_INIT_SP_ADDR \
 126         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 127
 128 #define CONFIG_ENV_OVERWRITE
 129 #define CONFIG_SYS_MMC_ENV_DEV          1   /* USDHC2 */
 130 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 131
 132 /* Size of malloc() pool */
 133 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
 134
 135 /* Totally 6GB DDR */
 136 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 137 #define PHYS_SDRAM                      0x40000000
 138 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 139 #define PHYS_SDRAM_2                    0x100000000
 140 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 141
 142 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 143 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 144                                         (PHYS_SDRAM_SIZE >> 1))
 145
 146 #define CONFIG_MXC_UART_BASE            UART2_BASE_ADDR
 147
 148 /* Monitor Command Prompt */
 149 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 150 #define CONFIG_SYS_CBSIZE               2048
 151 #define CONFIG_SYS_MAXARGS              64
 152 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 153 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 154                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 155
 156 #define CONFIG_FSL_USDHC
 157
 158 #define CONFIG_SYS_FSL_USDHC_NUM        2
 159 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 160
 161 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 162
 163 #define CONFIG_SYS_I2C_SPEED            100000
 164
 165 #endif