include/configs/imx8mp_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MP_EVK_H
   7 #define __IMX8MP_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  14
  15 #define CONFIG_SPL_MAX_SIZE             (152 * 1024)
  16 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
  17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  19 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  20
  21 #ifdef CONFIG_SPL_BUILD
  22 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
  23 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  24 #define CONFIG_SPL_STACK                0x960000
  25 #define CONFIG_SPL_BSS_START_ADDR       0x0098FC00
  26 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KB */
  27 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  28 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  29
  30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  31
  32 #undef CONFIG_DM_MMC
  33 #undef CONFIG_DM_PMIC
  34 #undef CONFIG_DM_PMIC_PFUZE100
  35
  36 #define CONFIG_POWER
  37 #define CONFIG_POWER_I2C
  38 #define CONFIG_POWER_PCA9450
  39
  40 #undef CONFIG_DM_I2C
  41 #define CONFIG_SYS_I2C
  42
  43 #endif
  44
  45 #if defined(CONFIG_CMD_NET)
  46 #define CONFIG_ETHPRIME                 "eth1" /* Set eqos to primary since we use its MDIO */
  47
  48 #define CONFIG_FEC_XCV_TYPE             RGMII
  49 #define CONFIG_FEC_MXC_PHYADDR          1
  50 #define FEC_QUIRK_ENET_MAC
  51
  52 #define DWC_NET_PHYADDR                 1
  53 #ifdef CONFIG_DWC_ETH_QOS
  54 #define CONFIG_SYS_NONCACHED_MEMORY     (1 * SZ_1M)     /* 1M */
  55 #endif
  56
  57 #define PHY_ANEG_TIMEOUT 20000
  58
  59 #endif
  60
  61 /* Initial environment variables */
  62 #define CONFIG_EXTRA_ENV_SETTINGS               \
  63         "script=boot.scr\0" \
  64         "image=Image\0" \
  65         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
  66         "fdt_addr=0x43000000\0"                 \
  67         "boot_fdt=try\0" \
  68         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  69         "initrd_addr=0x43800000\0"              \
  70         "bootm_size=0x10000000\0" \
  71         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  72         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  73         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  74         "mmcautodetect=yes\0" \
  75         "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
  76         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  77         "bootscript=echo Running bootscript from mmc ...; " \
  78                 "source\0" \
  79         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  80         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  81         "mmcboot=echo Booting from mmc ...; " \
  82                 "run mmcargs; " \
  83                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  84                         "if run loadfdt; then " \
  85                                 "booti ${loadaddr} - ${fdt_addr}; " \
  86                         "else " \
  87                                 "echo WARN: Cannot load the DT; " \
  88                         "fi; " \
  89                 "else " \
  90                         "echo wait for boot; " \
  91                 "fi;\0" \
  92         "netargs=setenv bootargs ${jh_clk} console=${console} " \
  93                 "root=/dev/nfs " \
  94                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  95         "netboot=echo Booting from net ...; " \
  96                 "run netargs;  " \
  97                 "if test ${ip_dyn} = yes; then " \
  98                         "setenv get_cmd dhcp; " \
  99                 "else " \
 100                         "setenv get_cmd tftp; " \
 101                 "fi; " \
 102                 "${get_cmd} ${loadaddr} ${image}; " \
 103                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 104                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 105                                 "booti ${loadaddr} - ${fdt_addr}; " \
 106                         "else " \
 107                                 "echo WARN: Cannot load the DT; " \
 108                         "fi; " \
 109                 "else " \
 110                         "booti; " \
 111                 "fi;\0"
 112
 113 #define CONFIG_BOOTCOMMAND \
 114            "mmc dev ${mmcdev}; if mmc rescan; then " \
 115                    "if run loadbootscript; then " \
 116                            "run bootscript; " \
 117                    "else " \
 118                            "if run loadimage; then " \
 119                                    "run mmcboot; " \
 120                            "else run netboot; " \
 121                            "fi; " \
 122                    "fi; " \
 123            "else booti ${loadaddr} - ${fdt_addr}; fi"
 124
 125 /* Link Definitions */
 126 #define CONFIG_LOADADDR                 0x40480000
 127
 128 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 129
 130 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 131 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 132 #define CONFIG_SYS_INIT_SP_OFFSET \
 133         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 134 #define CONFIG_SYS_INIT_SP_ADDR \
 135         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 136
 137 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 138
 139 /* Size of malloc() pool */
 140 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
 141
 142 /* Totally 6GB DDR */
 143 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 144 #define PHYS_SDRAM                      0x40000000
 145 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
 146 #define PHYS_SDRAM_2                    0x100000000
 147 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
 148
 149 #define CONFIG_MXC_UART_BASE            UART2_BASE_ADDR
 150
 151 /* Monitor Command Prompt */
 152 #define CONFIG_SYS_CBSIZE               2048
 153 #define CONFIG_SYS_MAXARGS              64
 154 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
 155 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 156                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 157
 158 #define CONFIG_FSL_USDHC
 159
 160 #define CONFIG_SYS_FSL_USDHC_NUM        2
 161 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 162
 163 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 164
 165 #define CONFIG_SYS_I2C_SPEED            100000
 166
 167 #endif