465e1cb4a7e9dc3fb6235c4af7f5f9cf87236d61
[platform/kernel/u-boot.git] / include / configs / imx8mp_evk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  */
5
6 #ifndef __IMX8MP_EVK_H
7 #define __IMX8MP_EVK_H
8
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12
13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
14
15 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
16 #define CONFIG_SYS_UBOOT_BASE   (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
17
18 #ifdef CONFIG_SPL_BUILD
19 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
20
21 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
22
23 #define CONFIG_POWER_PCA9450
24
25 #endif
26
27 #if defined(CONFIG_CMD_NET)
28 #define CONFIG_FEC_MXC_PHYADDR          1
29
30 #define DWC_NET_PHYADDR                 1
31
32 #define PHY_ANEG_TIMEOUT 20000
33
34 #endif
35
36 #ifndef CONFIG_SPL_BUILD
37 #define BOOT_TARGET_DEVICES(func) \
38        func(MMC, mmc, 1) \
39        func(MMC, mmc, 2)
40
41 #include <config_distro_bootcmd.h>
42 #endif
43
44 /* Initial environment variables */
45 #define CONFIG_EXTRA_ENV_SETTINGS               \
46         BOOTENV \
47         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
48         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
49         "image=Image\0" \
50         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
51         "fdt_addr_r=0x43000000\0"                       \
52         "boot_fdt=try\0" \
53         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
54         "initrd_addr=0x43800000\0"              \
55         "bootm_size=0x10000000\0" \
56         "mmcpart=1\0" \
57         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
58
59 /* Link Definitions */
60
61 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
62 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
63
64
65 /* Totally 6GB DDR */
66 #define CONFIG_SYS_SDRAM_BASE           0x40000000
67 #define PHYS_SDRAM                      0x40000000
68 #define PHYS_SDRAM_SIZE                 0xC0000000      /* 3 GB */
69 #define PHYS_SDRAM_2                    0x100000000
70 #define PHYS_SDRAM_2_SIZE               0xC0000000      /* 3 GB */
71
72 #endif