Merge tag 'xilinx-for-v2022.07-rc4' of https://source.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / include / configs / imx8mp_dhcom_pdk2.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2022 Marek Vasut <marex@denx.de>
4  */
5
6 #ifndef __IMX8MP_DHCOM_PDK2_H
7 #define __IMX8MP_DHCOM_PDK2_H
8
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12
13 #define CONFIG_SYS_BOOTM_LEN            SZ_128M
14
15 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN          SZ_1M
17
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_SPL_STACK                0x96FC00
20 #define CONFIG_SPL_BSS_START_ADDR       0x0096FC00
21 #define CONFIG_SPL_BSS_MAX_SIZE         0x400   /* 1 KiB */
22 #define CONFIG_SYS_SPL_MALLOC_START     0x4c000000
23 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 kiB */
24
25 /* For RAW image gives a error info not panic */
26 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
27
28 #endif
29
30 /* Link Definitions */
31 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
32 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
33 #define CONFIG_SYS_INIT_SP_OFFSET \
34         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
35 #define CONFIG_SYS_INIT_SP_ADDR \
36         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
37
38 #define CONFIG_SYS_SDRAM_BASE           0x40000000
39 #define PHYS_SDRAM                      0x40000000
40 #define PHYS_SDRAM_SIZE                 0x20000000 /* Minimum 512 MiB DDR */
41
42 #define CONFIG_MXC_UART_BASE            UART1_BASE_ADDR
43
44 /* Monitor Command Prompt */
45 #define CONFIG_SYS_CBSIZE               2048
46 #define CONFIG_SYS_MAXARGS              64
47 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
48 #define CONFIG_SYS_PBSIZE               \
49         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
50
51 /* PHY needs a longer autonegotiation timeout after reset */
52 #define PHY_ANEG_TIMEOUT                20000
53 #define FEC_QUIRK_ENET_MAC
54
55 /* USDHC */
56 #define CONFIG_SYS_FSL_USDHC_NUM        2
57 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
58
59 #if !defined(CONFIG_SPL_BUILD)
60
61 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
62         "altbootcmd=run bootcmd ; reset\0"                              \
63         "bootlimit=3\0"                                                 \
64         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"         \
65         "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"        \
66         "ramdisk_addr_r=0x58000000\0"                                   \
67         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0"            \
68         /* Give slow devices beyond USB HUB chance to come up. */       \
69         "usb_pgood_delay=2000\0"                                        \
70         "dfu_alt_info="                                                 \
71                 /* RAM block at DRAM offset 256..768 MiB */             \
72                 "ram ram0=ram ram 0x50000000 0x20000000&"               \
73                 /* 16 MiB SPI NOR */                                    \
74                 "mtd nor0=sf raw 0x0 0x1000000\0"                       \
75         "dh_update_env="                                                \
76                 "setenv dh_update_env true ; saveenv ; saveenv\0"       \
77         "dh_update_sf_gen_fcfb="                                        \
78                 "setexpr sfaddr ${loadaddr} - 0x1000 ; "                \
79                 "base ${sfaddr} ; "                                     \
80                 "mw 0 0 0x400 ; "                                       \
81                 "mw 0x400 0x42464346 ; "                                \
82                 "mw 0x404 0x56010000 ; "                                \
83                 "mw 0x40c 00030300 ; "                                  \
84                 "mw 0x444 0x00020101 ; "                                \
85                 "mw 0x450 0x10000000 ; "                                \
86                 "mw 0x480 0x0818040b ; "                                \
87                 "mw 0x484 0x24043008 ; "                                \
88                 "mw 0x5c0 0x100 ; "                                     \
89                 "mw 0x5c4 0x10000 ; "                                   \
90                 "base 0\0"                                              \
91         "dh_update_sf_write_data="                                      \
92                 "setexpr sfaddr ${loadaddr} - 0x1000 ; "                \
93                 "setexpr filesize ${filesize} + 0x1000 ; "              \
94                 "sf probe && sf update ${sfaddr} 0 ${filesize}\0"       \
95         "dh_update_sd_to_sf="                                           \
96                 "load mmc 0:1 ${loadaddr} boot/flash.bin && "           \
97                 "run dh_update_sf_gen_fcfb dh_update_sf_write_data\0"   \
98         "dh_update_emmc_to_sf="                                         \
99                 "load mmc 1:1 ${loadaddr} boot/flash.bin && "           \
100                 "run dh_update_sf_gen_fcfb dh_update_sf_write_data\0"   \
101         BOOTENV
102
103 #define BOOT_TARGET_DEVICES(func)       \
104         func(MMC, mmc, 0)               \
105         func(MMC, mmc, 1)               \
106         func(USB, usb, 0)               \
107         func(DHCP, dhcp, na)
108
109 #include <config_distro_bootcmd.h>
110
111 #endif
112
113 #endif