1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2022 Marek Vasut <marex@denx.de>
6 #ifndef __IMX8MP_DHCOM_PDK2_H
7 #define __IMX8MP_DHCOM_PDK2_H
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN SZ_128M
15 #define CONFIG_SYS_MONITOR_LEN SZ_1M
17 #ifdef CONFIG_SPL_BUILD
18 #define CONFIG_SPL_STACK 0x96FC00
19 #define CONFIG_SPL_BSS_START_ADDR 0x0096FC00
20 #define CONFIG_SYS_SPL_MALLOC_START 0x4c000000
21 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 kiB */
23 /* For RAW image gives a error info not panic */
24 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
28 /* Link Definitions */
29 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
30 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000
31 #define CONFIG_SYS_INIT_SP_OFFSET \
32 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
33 #define CONFIG_SYS_INIT_SP_ADDR \
34 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
36 #define CONFIG_SYS_SDRAM_BASE 0x40000000
37 #define PHYS_SDRAM 0x40000000
38 #define PHYS_SDRAM_SIZE 0x20000000 /* Minimum 512 MiB DDR */
40 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
42 /* PHY needs a longer autonegotiation timeout after reset */
43 #define PHY_ANEG_TIMEOUT 20000
44 #define FEC_QUIRK_ENET_MAC
47 #define CONFIG_SYS_FSL_USDHC_NUM 2
48 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
50 #if !defined(CONFIG_SPL_BUILD)
52 #define CONFIG_EXTRA_ENV_SETTINGS \
53 "altbootcmd=run bootcmd ; reset\0" \
55 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
56 "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
57 "ramdisk_addr_r=0x58000000\0" \
58 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
59 /* Give slow devices beyond USB HUB chance to come up. */ \
60 "usb_pgood_delay=2000\0" \
62 /* RAM block at DRAM offset 256..768 MiB */ \
63 "ram ram0=ram ram 0x50000000 0x20000000&" \
64 /* 16 MiB SPI NOR */ \
65 "mtd nor0=sf raw 0x0 0x1000000\0" \
67 "setenv dh_update_env true ; saveenv ; saveenv\0" \
68 "dh_update_sf_gen_fcfb=" \
69 "setexpr sfaddr ${loadaddr} - 0x1000 ; " \
72 "mw 0x400 0x42464346 ; " \
73 "mw 0x404 0x56010000 ; " \
74 "mw 0x40c 00030300 ; " \
75 "mw 0x444 0x00020101 ; " \
76 "mw 0x450 0x10000000 ; " \
77 "mw 0x480 0x0818040b ; " \
78 "mw 0x484 0x24043008 ; " \
80 "mw 0x5c4 0x10000 ; " \
82 "dh_update_sf_write_data=" \
83 "setexpr sfaddr ${loadaddr} - 0x1000 ; " \
84 "setexpr filesize ${filesize} + 0x1000 ; " \
85 "sf probe && sf update ${sfaddr} 0 ${filesize}\0" \
86 "dh_update_sd_to_sf=" \
87 "load mmc 0:1 ${loadaddr} boot/flash.bin && " \
88 "run dh_update_sf_gen_fcfb dh_update_sf_write_data\0" \
89 "dh_update_emmc_to_sf=" \
90 "load mmc 1:1 ${loadaddr} boot/flash.bin && " \
91 "run dh_update_sf_gen_fcfb dh_update_sf_write_data\0" \
94 #define BOOT_TARGET_DEVICES(func) \
100 #include <config_distro_bootcmd.h>