1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2022 Gateworks Corporation
6 #ifndef __IMX8MM_VENICE_H
7 #define __IMX8MM_VENICE_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN SZ_512K
14 #define CONFIG_SYS_UBOOT_BASE \
15 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
17 #ifdef CONFIG_SPL_BUILD
18 #define CONFIG_SPL_STACK 0x980000
19 #define CONFIG_SPL_BSS_START_ADDR 0x950000
20 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
21 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
22 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
24 /* For RAW image gives a error info not panic */
25 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
28 #define MEM_LAYOUT_ENV_SETTINGS \
29 "fdt_addr_r=0x44000000\0" \
30 "kernel_addr_r=0x42000000\0" \
31 "ramdisk_addr_r=0x46400000\0" \
32 "scriptaddr=0x46000000\0"
34 /* Enable Distro Boot */
35 #ifndef CONFIG_SPL_BUILD
36 #define BOOT_TARGET_DEVICES(func) \
40 #include <config_distro_bootcmd.h>
41 #undef CONFIG_ISO_PARTITION
46 /* Initial environment variables */
47 #define CONFIG_EXTRA_ENV_SETTINGS \
49 MEM_LAYOUT_ENV_SETTINGS \
51 "bootm_size=0x10000000\0" \
53 "preboot=gsc wd-disable\0" \
54 "console=ttymxc1,115200\0" \
56 "tftpboot $loadaddr $image && " \
57 "setexpr blkcnt $filesize + 0x1ff && " \
58 "setexpr blkcnt $blkcnt / 0x200 && " \
60 "mmc write $loadaddr 0x40 $blkcnt\0" \
62 "tftpboot $kernel_addr_r $image && " \
63 "booti $kernel_addr_r - $fdtcontroladdr\0" \
65 "tftpboot $loadaddr $image && " \
66 "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \
68 "tftpboot $loadaddr $image && " \
69 "gzwrite mmc $dev $loadaddr $filesize\0" \
70 "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0"
72 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
73 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
74 #define CONFIG_SYS_INIT_SP_OFFSET \
75 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
76 #define CONFIG_SYS_INIT_SP_ADDR \
77 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
79 #define CONFIG_SYS_SDRAM_BASE 0x40000000
81 /* SDRAM configuration */
82 #define PHYS_SDRAM 0x40000000
83 #define PHYS_SDRAM_SIZE SZ_1G
84 #define CONFIG_SYS_BOOTM_LEN SZ_256M
87 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
89 /* Monitor Command Prompt */
90 #define CONFIG_SYS_CBSIZE SZ_2K
91 #define CONFIG_SYS_MAXARGS 64
92 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
93 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
94 sizeof(CONFIG_SYS_PROMPT) + 16)
96 #define CONFIG_SYS_FSL_USDHC_NUM 2
97 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
100 #define CONFIG_ETHPRIME "eth0"
101 #define CONFIG_FEC_XCV_TYPE RGMII
102 #define CONFIG_FEC_MXC_PHYADDR 0
103 #define FEC_QUIRK_ENET_MAC