1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2022 Gateworks Corporation
6 #ifndef __IMX8MM_VENICE_H
7 #define __IMX8MM_VENICE_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_SYS_UBOOT_BASE \
13 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15 #ifdef CONFIG_SPL_BUILD
16 /* For RAW image gives a error info not panic */
19 #define MEM_LAYOUT_ENV_SETTINGS \
20 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
21 "fdt_addr_r=0x50200000\0" \
22 "scriptaddr=0x50280000\0" \
23 "ramdisk_addr_r=0x50300000\0" \
24 "kernel_comp_addr_r=0x40200000\0"
26 /* Enable Distro Boot */
27 #define BOOT_TARGET_DEVICES(func) \
32 #include <config_distro_bootcmd.h>
34 /* Initial environment variables */
35 #define CONFIG_EXTRA_ENV_SETTINGS \
37 MEM_LAYOUT_ENV_SETTINGS \
39 "bootm_size=0x10000000\0" \
41 "preboot=gsc wd-disable\0" \
42 "console=ttymxc1,115200\0" \
44 "tftpboot $loadaddr $image && " \
45 "setexpr blkcnt $filesize + 0x1ff && " \
46 "setexpr blkcnt $blkcnt / 0x200 && " \
48 "mmc write $loadaddr 0x40 $blkcnt\0" \
50 "if $fsload $fdt_addr_r $dir/$fdt_file1; " \
51 "then echo loaded $fdt_file1; " \
52 "elif $fsload $fdt_addr_r $dir/$fdt_file2; " \
53 "then echo loaded $fdt_file2; " \
54 "elif $fsload $fdt_addr_r $dir/$fdt_file3; " \
55 "then echo loaded $fdt_file3; " \
56 "elif $fsload $fdt_addr_r $dir/$fdt_file4; " \
57 "then echo loaded $fdt_file4; " \
58 "elif $fsload $fdt_addr_r $dir/$fdt_file5; " \
59 "then echo loaded $fdt_file5; " \
62 "setenv fsload tftpboot; " \
63 "run loadfdt && tftpboot $kernel_addr_r $dir/Image && " \
64 "booti $kernel_addr_r - $fdt_addr_r\0" \
66 "tftpboot $loadaddr $image && " \
67 "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \
69 "tftpboot $loadaddr $image && " \
70 "gzwrite mmc $dev $loadaddr $filesize\0" \
71 "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0"
73 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
74 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
76 #define CONFIG_SYS_SDRAM_BASE 0x40000000
78 /* SDRAM configuration */
79 #define PHYS_SDRAM 0x40000000
80 #define PHYS_SDRAM_SIZE SZ_4G
83 #define CONFIG_FEC_MXC_PHYADDR 0
84 #define FEC_QUIRK_ENET_MAC