include/configs/imx8mn_var_som.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2021 Collabora Ltd.
   4  */
   5
   6 #ifndef __IMX8MN_VAR_SOM_H
   7 #define __IMX8MN_VAR_SOM_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  14
  15 #define CONFIG_SPL_MAX_SIZE             (148 * SZ_1K)
  16 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  17 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR         0x300
  19 #define CONFIG_SYS_UBOOT_BASE   \
  20         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  21
  22 #define CONFIG_SPL_STACK                0x980000
  23 #define CONFIG_SPL_BSS_START_ADDR       0x950000
  24 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K
  25 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  26 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K
  27
  28 #define BOOT_TARGET_DEVICES(func) \
  29         func(MMC, mmc, 1) \
  30         func(MMC, mmc, 2) \
  31         func(MMC, mmc, 0) \
  32         func(PXE, pxe, na) \
  33         func(DHCP, dhcp, na) \
  34
  35 #include <config_distro_bootcmd.h>
  36
  37 /* ENET */
  38 #if defined(CONFIG_FEC_MXC)
  39 #define CONFIG_ETHPRIME                 "FEC"
  40 #define CONFIG_FEC_XCV_TYPE             RGMII
  41 #endif /* CONFIG_FEC_MXC */
  42
  43 #define MEM_LAYOUT_ENV_SETTINGS \
  44         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  45         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  46         "ramdisk_addr_r=0x43800000\0" \
  47         "fdt_addr_r=0x43000000\0" \
  48         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  49         "fastboot_partition_alias_all=" \
  50                 __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".0:0\0" \
  51         "fastboot_partition_alias_bootloader=" \
  52                 __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".1:0\0" \
  53         "emmc_dev=" __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) "\0" \
  54         "emmc_ack=1\0" \
  55         "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  56
  57 /* Initial environment variables */
  58 #define CONFIG_EXTRA_ENV_SETTINGS \
  59         MEM_LAYOUT_ENV_SETTINGS \
  60         BOOTENV
  61
  62 /* Link Definitions */
  63
  64 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  65 #define CONFIG_SYS_INIT_RAM_SIZE        SZ_512K
  66 #define CONFIG_SYS_INIT_SP_OFFSET \
  67         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  68 #define CONFIG_SYS_INIT_SP_ADDR \
  69         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  70
  71 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  72 #define PHYS_SDRAM                      0x40000000
  73 #define PHYS_SDRAM_SIZE                 SZ_1G /* 1GB DDR */
  74
  75 #define CONFIG_MXC_UART_BASE            UART4_BASE_ADDR
  76
  77 /* Monitor Command Prompt */
  78 #define CONFIG_SYS_CBSIZE               SZ_2K
  79 #define CONFIG_SYS_MAXARGS              64
  80 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  81 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  82                                          sizeof(CONFIG_SYS_PROMPT) + 16)
  83
  84 /* USDHC */
  85 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  86
  87 /* I2C */
  88 #define CONFIG_SYS_I2C_SPEED            400000
  89
  90 #endif /* __IMX8MN_VAR_SOM_H */