1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #ifdef CONFIG_SECURE_BOOT
14 #define CONFIG_CSF_SIZE SZ_8K
17 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
18 #define CONFIG_SYS_MONITOR_LEN SZ_512K
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
20 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
21 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
22 #define CONFIG_SYS_UBOOT_BASE \
23 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
25 #ifdef CONFIG_SPL_BUILD
26 #define CONFIG_SPL_STACK 0x95fff0
27 #define CONFIG_SPL_BSS_START_ADDR 0x00950000
28 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
29 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
30 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
31 #define CONFIG_SYS_ICACHE_OFF
32 #define CONFIG_SYS_DCACHE_OFF
34 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
35 #define CONFIG_MALLOC_F_ADDR 0x00940000
37 /* For RAW image gives a error info not panic */
38 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
42 /* Initial environment variables */
43 #define CONFIG_EXTRA_ENV_SETTINGS \
46 "console=ttymxc1,115200\0" \
47 "fdt_addr=0x43000000\0" \
48 "fdt_high=0xffffffffffffffff\0" \
50 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
51 "initrd_addr=0x43800000\0" \
52 "initrd_high=0xffffffffffffffff\0" \
53 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
54 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
55 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
56 "mmcautodetect=yes\0" \
57 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
58 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
59 "bootscript=echo Running bootscript from mmc ...; " \
61 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
62 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
63 "mmcboot=echo Booting from mmc ...; " \
65 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
66 "bootm ${loadaddr}; " \
68 "if run loadfdt; then " \
69 "booti ${loadaddr} - ${fdt_addr}; " \
71 "echo WARN: Cannot load the DT; " \
74 "netargs=setenv bootargs console=${console} " \
76 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
77 "netboot=echo Booting from net ...; " \
79 "if test ${ip_dyn} = yes; then " \
80 "setenv get_cmd dhcp; " \
82 "setenv get_cmd tftp; " \
84 "${get_cmd} ${loadaddr} ${image}; " \
85 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
86 "bootm ${loadaddr}; " \
88 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
89 "booti ${loadaddr} - ${fdt_addr}; " \
91 "echo WARN: Cannot load the DT; " \
95 #define CONFIG_BOOTCOMMAND \
96 "mmc dev ${mmcdev}; if mmc rescan; then " \
97 "if run loadbootscript; then " \
100 "if run loadimage; then " \
102 "else run netboot; " \
107 /* Link Definitions */
108 #define CONFIG_LOADADDR 0x40480000
110 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
112 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
113 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000
114 #define CONFIG_SYS_INIT_SP_OFFSET \
115 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
116 #define CONFIG_SYS_INIT_SP_ADDR \
117 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
119 #define CONFIG_ENV_OVERWRITE
120 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
121 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
123 /* Size of malloc() pool */
124 #define CONFIG_SYS_MALLOC_LEN SZ_32M
126 #define CONFIG_SYS_SDRAM_BASE 0x40000000
127 #define PHYS_SDRAM 0x40000000
128 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
130 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
132 /* Monitor Command Prompt */
133 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
134 #define CONFIG_SYS_CBSIZE 2048
135 #define CONFIG_SYS_MAXARGS 64
136 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
137 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
138 sizeof(CONFIG_SYS_PROMPT) + 16)
141 #define CONFIG_FSL_USDHC
143 #define CONFIG_SYS_FSL_USDHC_NUM 2
144 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
146 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
148 #define CONFIG_SYS_I2C_SPEED 100000