1 /* SPDX-License-Identifier: GPL-2.0+ */
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
15 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN SZ_512K
17 #define CONFIG_SYS_UBOOT_BASE \
18 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
20 #ifdef CONFIG_SPL_BUILD
21 #define CONFIG_SPL_STACK 0x980000
22 #define CONFIG_SPL_BSS_START_ADDR 0x950000
23 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
24 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
25 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
27 /* For RAW image gives a error info not panic */
28 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
32 #ifndef CONFIG_SPL_BUILD
33 #define BOOT_TARGET_DEVICES(func) \
38 #include <config_distro_bootcmd.h>
41 /* Initial environment variables */
42 #define CONFIG_EXTRA_ENV_SETTINGS \
45 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
46 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
47 "console=ttymxc1,115200\0" \
48 "fdt_addr_r=0x43000000\0" \
50 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
51 "initrd_addr=0x43800000\0" \
52 "bootm_size=0x10000000\0" \
54 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
56 /* Link Definitions */
58 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
59 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000
60 #define CONFIG_SYS_INIT_SP_OFFSET \
61 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
62 #define CONFIG_SYS_INIT_SP_ADDR \
63 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
65 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
67 #define CONFIG_SYS_SDRAM_BASE 0x40000000
68 #define PHYS_SDRAM 0x40000000
69 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
71 #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
73 /* Monitor Command Prompt */
74 #define CONFIG_SYS_CBSIZE 2048
75 #define CONFIG_SYS_MAXARGS 64
76 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
77 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
78 sizeof(CONFIG_SYS_PROMPT) + 16)
82 #define CONFIG_SYS_FSL_USDHC_NUM 2
83 #define CONFIG_SYS_FSL_ESDHC_ADDR 0