1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2021 Collabora Ltd.
6 #ifndef __IMX8MN_BSH_SMM_S2_COMMON_H
7 #define __IMX8MN_BSH_SMM_S2_COMMON_H
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
15 #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
16 #define CONFIG_SYS_MONITOR_LEN SZ_512K
17 #define CONFIG_SYS_UBOOT_BASE \
18 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
20 #define CONFIG_SPL_STACK 0x980000
21 #define CONFIG_SPL_BSS_START_ADDR 0x950000
22 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
23 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
24 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
28 #define MEM_LAYOUT_ENV_SETTINGS \
29 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
30 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
31 "ramdisk_addr_r=0x43800000\0" \
32 "fdt_addr_r=0x43000000\0" \
33 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
34 "bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \
36 /* Link Definitions */
38 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
39 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
40 #define CONFIG_SYS_INIT_SP_OFFSET \
41 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
42 #define CONFIG_SYS_INIT_SP_ADDR \
43 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
45 #define CONFIG_SYS_SDRAM_BASE 0x40000000
46 #define PHYS_SDRAM 0x40000000
48 #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
50 /* Monitor Command Prompt */
51 #define CONFIG_SYS_CBSIZE SZ_2K
52 #define CONFIG_SYS_MAXARGS 64
53 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
54 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
55 sizeof(CONFIG_SYS_PROMPT) + 16)
59 #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */