1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2021 Collabora Ltd.
6 #ifndef __IMX8MN_BSH_SMM_S2_COMMON_H
7 #define __IMX8MN_BSH_SMM_S2_COMMON_H
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
15 #define CONFIG_SYS_MONITOR_LEN SZ_512K
16 #define CONFIG_SYS_UBOOT_BASE \
17 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
19 #define CONFIG_SPL_BSS_START_ADDR 0x950000
20 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
21 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
25 #define MEM_LAYOUT_ENV_SETTINGS \
26 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
27 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
28 "ramdisk_addr_r=0x43800000\0" \
29 "fdt_addr_r=0x43000000\0" \
30 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
31 "bootcmd_mfg=echo Running fastboot mode; fastboot usb 0\0" \
33 /* Link Definitions */
35 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
36 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
38 #define CONFIG_SYS_SDRAM_BASE 0x40000000
39 #define PHYS_SDRAM 0x40000000
41 #define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
45 #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */