Merge branch 'master' of git://git.denx.de/u-boot-usb
[platform/kernel/u-boot.git] / include / configs / imx8mm_evk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  */
5
6 #ifndef __IMX8MM_EVK_H
7 #define __IMX8MM_EVK_H
8
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
11
12 #ifdef CONFIG_SECURE_BOOT
13 #define CONFIG_CSF_SIZE                 SZ_8K
14 #endif
15
16 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
17 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
20 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
21 #define CONFIG_SYS_UBOOT_BASE   \
22         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
23
24 #ifdef CONFIG_SPL_BUILD
25 #define CONFIG_SPL_STACK                0x920000
26 #define CONFIG_SPL_BSS_START_ADDR       0x910000
27 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K   /* 8 KB */
28 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
29 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
30
31 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
32 #define CONFIG_MALLOC_F_ADDR            0x930000
33 /* For RAW image gives a error info not panic */
34 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
35
36 #endif
37
38 /* Initial environment variables */
39 #define CONFIG_EXTRA_ENV_SETTINGS               \
40         "script=boot.scr\0" \
41         "image=Image.itb\0" \
42         "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \
43         "fdt_addr=0x43000000\0"                 \
44         "fdt_high=0xffffffffffffffff\0"         \
45         "boot_fit=try\0" \
46         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
47         "initrd_addr=0x43800000\0"              \
48         "initrd_high=0xffffffffffffffff\0" \
49         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
50         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
51         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
52         "mmcautodetect=yes\0" \
53         "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
54         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
55         "bootscript=echo Running bootscript from mmc ...; " \
56                 "source\0" \
57         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
58         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
59         "mmcboot=echo Booting from mmc ...; " \
60                 "run mmcargs; " \
61                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
62                         "bootm ${loadaddr}; " \
63                 "else " \
64                         "if run loadfdt; then " \
65                                 "booti ${loadaddr} - ${fdt_addr}; " \
66                         "else " \
67                                 "echo WARN: Cannot load the DT; " \
68                         "fi; " \
69                 "fi;\0" \
70         "netargs=setenv bootargs console=${console} " \
71                 "root=/dev/nfs " \
72                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
73         "netboot=echo Booting from net ...; " \
74                 "run netargs;  " \
75                 "if test ${ip_dyn} = yes; then " \
76                         "setenv get_cmd dhcp; " \
77                 "else " \
78                         "setenv get_cmd tftp; " \
79                 "fi; " \
80                 "${get_cmd} ${loadaddr} ${image}; " \
81                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
82                         "bootm ${loadaddr}; " \
83                 "else " \
84                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
85                                 "booti ${loadaddr} - ${fdt_addr}; " \
86                         "else " \
87                                 "echo WARN: Cannot load the DT; " \
88                         "fi; " \
89                 "fi;\0"
90
91 #define CONFIG_BOOTCOMMAND \
92            "mmc dev ${mmcdev}; if mmc rescan; then " \
93                    "if run loadbootscript; then " \
94                            "run bootscript; " \
95                    "else " \
96                            "if run loadimage; then " \
97                                    "run mmcboot; " \
98                            "else run netboot; " \
99                            "fi; " \
100                    "fi; " \
101            "fi;"
102
103 /* Link Definitions */
104 #define CONFIG_LOADADDR                 0x40480000
105
106 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
107
108 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
109 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
110 #define CONFIG_SYS_INIT_SP_OFFSET \
111         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
112 #define CONFIG_SYS_INIT_SP_ADDR \
113         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
114
115 #define CONFIG_ENV_OVERWRITE
116 #define CONFIG_SYS_MMC_ENV_DEV          0   /* USDHC2 */
117 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
118
119 /* Size of malloc() pool */
120 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
121
122 #define CONFIG_SYS_SDRAM_BASE           0x40000000
123 #define PHYS_SDRAM                      0x40000000
124 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
125
126 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
127 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
128
129 #define CONFIG_MXC_UART_BASE            UART2_BASE_ADDR
130
131 /* Monitor Command Prompt */
132 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
133 #define CONFIG_SYS_CBSIZE               2048
134 #define CONFIG_SYS_MAXARGS              64
135 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
136 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
137                                         sizeof(CONFIG_SYS_PROMPT) + 16)
138
139 /* USDHC */
140 #define CONFIG_FSL_USDHC
141
142 #define CONFIG_SYS_FSL_USDHC_NUM        2
143 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
144
145 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
146
147 #define CONFIG_SYS_I2C_SPEED            100000
148
149 #define CONFIG_ETHPRIME                 "FEC"
150
151 #define CONFIG_FEC_XCV_TYPE             RGMII
152 #define CONFIG_FEC_MXC_PHYADDR          0
153 #define FEC_QUIRK_ENET_MAC
154
155 #define IMX_FEC_BASE                    0x30BE0000
156
157 #endif