include/configs/imx8mm_evk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MM_EVK_H
   7 #define __IMX8MM_EVK_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12
  13 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  14 #define UBOOT_ITB_OFFSET                        0x57C00
  15 #define FSPI_CONF_BLOCK_SIZE            0x1000
  16 #define UBOOT_ITB_OFFSET_FSPI  \
  17         (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
  18 #ifdef CONFIG_FSPI_CONF_HEADER
  19 #define CONFIG_SYS_UBOOT_BASE  \
  20         (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
  21 #else
  22 #define CONFIG_SYS_UBOOT_BASE   \
  23         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  24 #endif
  25
  26 #ifdef CONFIG_SPL_BUILD
  27 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  28 #define CONFIG_MALLOC_F_ADDR            0x930000
  29 /* For RAW image gives a error info not panic */
  30
  31 #endif
  32
  33 #define BOOT_TARGET_DEVICES(func) \
  34         func(MMC, mmc, 1) \
  35         func(MMC, mmc, 2) \
  36         func(DHCP, dhcp, na)
  37
  38 #include <config_distro_bootcmd.h>
  39
  40 /* Initial environment variables */
  41 #define CONFIG_EXTRA_ENV_SETTINGS               \
  42         BOOTENV \
  43         "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  44         "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  45         "image=Image\0" \
  46         "console=ttymxc1,115200\0" \
  47         "fdt_addr_r=0x43000000\0"                       \
  48         "boot_fit=no\0" \
  49         "fdtfile=imx8mm-evk.dtb\0" \
  50         "initrd_addr=0x43800000\0"              \
  51         "bootm_size=0x10000000\0" \
  52         "mmcpart=1\0" \
  53         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  54
  55 /* Link Definitions */
  56
  57 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  58 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
  59
  60
  61 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  62 #define PHYS_SDRAM                      0x40000000
  63 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
  64
  65 #define CONFIG_FEC_MXC_PHYADDR          0
  66
  67 #endif