include/configs/imx8mm_beacon.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2020 Compass Electronics Group, LLC
   4  */
   5
   6 #ifndef __IMX8MM_BEACON_H
   7 #define __IMX8MM_BEACON_H
   8
   9 #include <linux/sizes.h>
  10 #include <asm/arch/imx-regs.h>
  11
  12 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
  13 #define CONFIG_SYS_MONITOR_LEN  SZ_512K
  14 #define CONFIG_SYS_UBOOT_BASE   \
  15         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  16
  17 #ifdef CONFIG_SPL_BUILD
  18 #define CONFIG_SPL_STACK                0x920000
  19 #define CONFIG_SPL_BSS_START_ADDR       0x910000
  20 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K   /* 8 KB */
  21 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  22 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  23
  24 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  25 #define CONFIG_MALLOC_F_ADDR            0x930000
  26 /* For RAW image gives a error info not panic */
  27 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  28
  29 #endif
  30
  31 /* Initial environment variables */
  32 #define CONFIG_EXTRA_ENV_SETTINGS               \
  33         "script=boot.scr\0" \
  34         "image=Image\0" \
  35         "console=ttymxc1,115200\0" \
  36         "fdt_addr=0x43000000\0"                 \
  37         "boot_fit=try\0" \
  38         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  39         "initrd_addr=0x43800000\0"              \
  40         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  41         "mmcpart=1\0" \
  42         "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
  43         "mmcautodetect=yes\0" \
  44         "mmcargs=setenv bootargs console=${console},${baudrate}" \
  45         " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
  46         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
  47         " ${script};\0" \
  48         "bootscript=echo Running bootscript from mmc ...; " \
  49                 "source\0" \
  50         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  51         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  52         "mmcboot=echo Booting from mmc ...; " \
  53                 "run finduuid; " \
  54                 "run mmcargs; " \
  55                 "if run loadfdt; then " \
  56                         "booti ${loadaddr} - ${fdt_addr}; " \
  57                 "else " \
  58                         "echo WARN: Cannot load the DT; " \
  59                 "fi; " \
  60         "netargs=setenv bootargs console=${console} " \
  61                 "root=/dev/nfs " \
  62                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  63         "netboot=echo Booting from net ...; " \
  64                 "run netargs;  " \
  65                 "if test ${ip_dyn} = yes; then " \
  66                         "setenv get_cmd dhcp; " \
  67                 "else " \
  68                         "setenv get_cmd tftp; " \
  69                 "fi; " \
  70                 "${get_cmd} ${loadaddr} ${image}; " \
  71                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
  72                         "bootm ${loadaddr}; " \
  73                 "else " \
  74                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  75                                 "booti ${loadaddr} - ${fdt_addr}; " \
  76                         "else " \
  77                                 "echo WARN: Cannot load the DT; " \
  78                         "fi; " \
  79                 "fi;\0"
  80
  81 /* Link Definitions */
  82
  83 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  84 #define CONFIG_SYS_INIT_RAM_SIZE        0x200000
  85 #define CONFIG_SYS_INIT_SP_OFFSET \
  86         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  87 #define CONFIG_SYS_INIT_SP_ADDR \
  88         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  89
  90 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  91 #define PHYS_SDRAM                      0x40000000
  92 #define PHYS_SDRAM_SIZE         0x80000000 /* 2GB DDR */
  93
  94 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(2)
  95
  96 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  97 #endif