1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2020 Compass Electronics Group, LLC
6 #ifndef __IMX8MM_BEACON_H
7 #define __IMX8MM_BEACON_H
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
12 #define CONFIG_SYS_UBOOT_BASE \
13 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15 #ifdef CONFIG_SPL_BUILD
16 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
17 #define CONFIG_MALLOC_F_ADDR 0x930000
18 /* For RAW image gives a error info not panic */
22 /* Initial environment variables */
23 #define CONFIG_EXTRA_ENV_SETTINGS \
26 "console=ttymxc1,115200\0" \
27 "fdt_addr=0x43000000\0" \
29 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
30 "initrd_addr=0x43800000\0" \
31 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
33 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
34 "mmcautodetect=yes\0" \
35 "mmcargs=setenv bootargs console=${console},${baudrate}" \
36 " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
37 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
39 "bootscript=echo Running bootscript from mmc ...; " \
41 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
42 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
43 "mmcboot=echo Booting from mmc ...; " \
46 "if run loadfdt; then " \
47 "booti ${loadaddr} - ${fdt_addr}; " \
49 "echo WARN: Cannot load the DT; " \
51 "netargs=setenv bootargs console=${console} " \
53 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
54 "netboot=echo Booting from net ...; " \
56 "if test ${ip_dyn} = yes; then " \
57 "setenv get_cmd dhcp; " \
59 "setenv get_cmd tftp; " \
61 "${get_cmd} ${loadaddr} ${image}; " \
62 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
63 "bootm ${loadaddr}; " \
65 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
66 "booti ${loadaddr} - ${fdt_addr}; " \
68 "echo WARN: Cannot load the DT; " \
72 /* Link Definitions */
74 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
75 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000
77 #define CONFIG_SYS_SDRAM_BASE 0x40000000
78 #define PHYS_SDRAM 0x40000000
79 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */