include/configs/imx8mm-cl-iot-gate.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #ifndef __IMX8MM_CL_IOT_GATE_H
   7 #define __IMX8MM_CL_IOT_GATE_H
   8
   9 #include <linux/sizes.h>
  10 #include <linux/stringify.h>
  11 #include <asm/arch/imx-regs.h>
  12 #include <config_distro_bootcmd.h>
  13
  14 #define CONFIG_SYS_BOOTM_LEN            (32 * SZ_1M)
  15 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
  16 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  17 #define CONFIG_SYS_UBOOT_BASE   \
  18         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  19
  20 #ifdef CONFIG_SPL_BUILD
  21 #define CONFIG_SPL_STACK                0x920000
  22 #define CONFIG_SPL_BSS_START_ADDR       0x910000
  23 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K   /* 8 KB */
  24 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  25 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  26
  27 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  28 #define CONFIG_MALLOC_F_ADDR            0x912000
  29 /* For RAW image gives a error info not panic */
  30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  31
  32 #endif
  33
  34 /* GUIDs for capsule updatable firmware images */
  35 #define IMX8MM_CL_IOT_GATE_FIT_IMAGE_GUID \
  36         EFI_GUID(0x7a32a939, 0xab92, 0x467b, 0x91, 0x52, \
  37                  0x74, 0x77, 0x1b, 0x95, 0xe6, 0x46)
  38
  39 #define IMX8MM_CL_IOT_GATE_OPTEE_FIT_IMAGE_GUID \
  40         EFI_GUID(0x0bf1165c, 0x1831, 0x4864, 0x94, 0x5e, \
  41                  0xac, 0x3d, 0x38, 0x48, 0xf4, 0x99)
  42
  43 #if CONFIG_IS_ENABLED(CMD_MMC)
  44 # define BOOT_TARGET_MMC(func) \
  45         func(MMC, mmc, 2)      \
  46         func(MMC, mmc, 0)
  47 #else
  48 # define BOOT_TARGET_MMC(func)
  49 #endif
  50
  51 #if CONFIG_IS_ENABLED(CMD_USB)
  52 # define BOOT_TARGET_USB(func) func(USB, usb, 0)
  53 #else
  54 # define BOOT_TARGET_USB(func)
  55 #endif
  56
  57 #if CONFIG_IS_ENABLED(CMD_PXE)
  58 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
  59 #else
  60 # define BOOT_TARGET_PXE(func)
  61 #endif
  62
  63 #if CONFIG_IS_ENABLED(CMD_DHCP)
  64 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
  65 #else
  66 # define BOOT_TARGET_DHCP(func)
  67 #endif
  68
  69 #define BOOT_TARGET_DEVICES(func) \
  70         BOOT_TARGET_USB(func) \
  71         BOOT_TARGET_MMC(func) \
  72         BOOT_TARGET_PXE(func) \
  73         BOOT_TARGET_DHCP(func)
  74
  75 /* Initial environment variables */
  76 #define CONFIG_EXTRA_ENV_SETTINGS               \
  77         BOOTENV \
  78         "script=boot.scr\0" \
  79         "image=Image\0" \
  80         "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
  81         "fdt_addr=0x43000000\0"                 \
  82         "fdt_addr_r=0x43000000\0" \
  83         "boot_fit=no\0" \
  84         "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \
  85         "fdt_file=sb-iotgimx8.dtb\0" \
  86         "fdtfile=sb-iotgimx8.dtb\0" \
  87         "initrd_addr=0x43800000\0"              \
  88         "bootm_size=0x10000000\0" \
  89         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
  90         "mmcpart=1\0" \
  91         "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
  92         "mmcautodetect=yes\0" \
  93         "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  94         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  95         "bootscript=echo Running bootscript from mmc ...; " \
  96                 "source\0" \
  97         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  98         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  99         "kernel_addr_r=0x40480000\0" \
 100         "pxefile_addr_r=0x40480000\0" \
 101         "ramdisk_addr_r=0x43800000\0" \
 102         "mmcboot=echo Booting from mmc ...; " \
 103                 "run mmcargs; " \
 104                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 105                         "bootm ${loadaddr}; " \
 106                 "else " \
 107                         "if run loadfdt; then " \
 108                                 "booti ${loadaddr} - ${fdt_addr}; " \
 109                         "else " \
 110                                 "echo WARN: Cannot load the DT; " \
 111                         "fi; " \
 112                 "fi;\0" \
 113         "netargs=setenv bootargs console=${console} " \
 114                 "root=/dev/nfs " \
 115                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
 116         "netboot=echo Booting from net ...; " \
 117                 "run netargs;  " \
 118                 "if test ${ip_dyn} = yes; then " \
 119                         "setenv get_cmd dhcp; " \
 120                 "else " \
 121                         "setenv get_cmd tftp; " \
 122                 "fi; " \
 123                 "${get_cmd} ${loadaddr} ${image}; " \
 124                 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
 125                         "bootm ${loadaddr}; " \
 126                 "else " \
 127                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 128                                 "booti ${loadaddr} - ${fdt_addr}; " \
 129                         "else " \
 130                                 "echo WARN: Cannot load the DT; " \
 131                         "fi; " \
 132                 "fi;\0"
 133
 134 /* Link Definitions */
 135
 136 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 137 #define CONFIG_SYS_INIT_RAM_SIZE        0x80000
 138 #define CONFIG_SYS_INIT_SP_OFFSET \
 139         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 140 #define CONFIG_SYS_INIT_SP_ADDR \
 141         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 142
 143
 144 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 145 #define PHYS_SDRAM                      0x40000000
 146 #define PHYS_SDRAM_SIZE                 0x80000000 /* 2GB DDR */
 147
 148 #define CONFIG_MXC_UART_BASE            UART_BASE_ADDR(3)
 149
 150 /* USDHC */
 151
 152 #define CONFIG_SYS_FSL_USDHC_NUM        2
 153 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 154
 155 #define CONFIG_FEC_MXC_PHYADDR          0
 156
 157 /* USB Configs */
 158 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 159 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
 160 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 161
 162 #endif /*__IMX8MM_CL_IOT_GATE_H*/