1 /* SPDX-License-Identifier: GPL-2.0+ */
6 #ifndef __IMX8MM_CL_IOT_GATE_H
7 #define __IMX8MM_CL_IOT_GATE_H
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12 #include <config_distro_bootcmd.h>
14 #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
15 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
16 #define CONFIG_SYS_MONITOR_LEN SZ_512K
17 #define CONFIG_SYS_UBOOT_BASE \
18 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
20 #ifdef CONFIG_SPL_BUILD
21 #define CONFIG_SPL_STACK 0x920000
22 #define CONFIG_SPL_BSS_START_ADDR 0x910000
23 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
24 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
25 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
27 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
28 #define CONFIG_MALLOC_F_ADDR 0x912000
29 /* For RAW image gives a error info not panic */
30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
34 #if CONFIG_IS_ENABLED(CMD_MMC)
35 # define BOOT_TARGET_MMC(func) \
39 # define BOOT_TARGET_MMC(func)
42 #if CONFIG_IS_ENABLED(CMD_USB)
43 # define BOOT_TARGET_USB(func) func(USB, usb, 0)
45 # define BOOT_TARGET_USB(func)
48 #if CONFIG_IS_ENABLED(CMD_PXE)
49 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
51 # define BOOT_TARGET_PXE(func)
54 #if CONFIG_IS_ENABLED(CMD_DHCP)
55 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na)
57 # define BOOT_TARGET_DHCP(func)
60 #define BOOT_TARGET_DEVICES(func) \
61 BOOT_TARGET_USB(func) \
62 BOOT_TARGET_MMC(func) \
63 BOOT_TARGET_PXE(func) \
64 BOOT_TARGET_DHCP(func)
66 /* Initial environment variables */
67 #define CONFIG_EXTRA_ENV_SETTINGS \
71 "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \
72 "fdt_addr=0x43000000\0" \
73 "fdt_addr_r=0x43000000\0" \
75 "dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \
76 "fdt_file=sb-iotgimx8.dtb\0" \
77 "fdtfile=sb-iotgimx8.dtb\0" \
78 "initrd_addr=0x43800000\0" \
79 "bootm_size=0x10000000\0" \
80 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
82 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
83 "mmcautodetect=yes\0" \
84 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
85 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
86 "bootscript=echo Running bootscript from mmc ...; " \
88 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
89 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
90 "kernel_addr_r=0x40480000\0" \
91 "pxefile_addr_r=0x40480000\0" \
92 "ramdisk_addr_r=0x43800000\0" \
93 "mmcboot=echo Booting from mmc ...; " \
95 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
96 "bootm ${loadaddr}; " \
98 "if run loadfdt; then " \
99 "booti ${loadaddr} - ${fdt_addr}; " \
101 "echo WARN: Cannot load the DT; " \
104 "netargs=setenv bootargs console=${console} " \
106 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
107 "netboot=echo Booting from net ...; " \
109 "if test ${ip_dyn} = yes; then " \
110 "setenv get_cmd dhcp; " \
112 "setenv get_cmd tftp; " \
114 "${get_cmd} ${loadaddr} ${image}; " \
115 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
116 "bootm ${loadaddr}; " \
118 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
119 "booti ${loadaddr} - ${fdt_addr}; " \
121 "echo WARN: Cannot load the DT; " \
125 /* Link Definitions */
127 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
128 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000
129 #define CONFIG_SYS_INIT_SP_OFFSET \
130 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
131 #define CONFIG_SYS_INIT_SP_ADDR \
132 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
134 #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
136 #define CONFIG_SYS_SDRAM_BASE 0x40000000
137 #define PHYS_SDRAM 0x40000000
138 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
140 #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
142 /* Monitor Command Prompt */
143 #define CONFIG_SYS_CBSIZE 2048
144 #define CONFIG_SYS_MAXARGS 64
145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
146 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
147 sizeof(CONFIG_SYS_PROMPT) + 16)
151 #define CONFIG_SYS_FSL_USDHC_NUM 2
152 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
154 #define CONFIG_ETHPRIME "FEC"
156 #define CONFIG_FEC_XCV_TYPE RGMII
157 #define CONFIG_FEC_MXC_PHYADDR 0
158 #define FEC_QUIRK_ENET_MAC
160 #define IMX_FEC_BASE 0x30BE0000
163 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
164 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
165 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
167 #endif /*__IMX8MM_CL_IOT_GATE_H*/