2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
5 * Configuration settings for the Engicam i.CoreM6 QDL RQS Starter Kits.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __IMX6QLD_ICORE_RQS_CONFIG_H
11 #define __IMX6QLD_ICORE_RQS_CONFIG_H
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
16 /* Size of malloc() pool */
17 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
19 /* Total Size of Environment Sector */
20 #define CONFIG_ENV_SIZE SZ_128K
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
26 #ifndef CONFIG_ENV_IS_NOWHERE
27 /* Environment in MMC */
28 # if defined(CONFIG_ENV_IS_IN_MMC)
29 # define CONFIG_ENV_OFFSET 0x100000
33 /* Default environment */
34 #define CONFIG_EXTRA_ENV_SETTINGS \
38 "fdt_high=0xffffffff\0" \
39 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
40 "fdt_addr=0x18000000\0" \
44 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
45 "mmcautodetect=yes\0" \
46 "mmcargs=setenv bootargs console=${console},${baudrate} " \
49 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
50 "bootscript=echo Running bootscript from mmc ...; " \
52 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
53 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
54 "mmcboot=echo Booting from mmc ...; " \
56 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
57 "if run loadfdt; then " \
58 "bootm ${loadaddr} - ${fdt_addr}; " \
60 "if test ${boot_fdt} = try; then " \
63 "echo WARN: Cannot load the DT; " \
70 #define CONFIG_BOOTCOMMAND \
71 "mmc dev ${mmcdev};" \
72 "if mmc rescan; then " \
73 "if run loadbootscript; then " \
76 "if run loadimage; then " \
82 /* Miscellaneous configurable options */
83 #define CONFIG_SYS_MEMTEST_START 0x80000000
84 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
86 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
87 #define CONFIG_SYS_HZ 1000
89 /* Physical Memory Map */
90 #define CONFIG_NR_DRAM_BANKS 1
91 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
93 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
94 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
95 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
97 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
98 GENERATED_GBL_DATA_SIZE)
99 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
100 CONFIG_SYS_INIT_SP_OFFSET)
104 # define CONFIG_HASH_VERIFY
106 # define CONFIG_SHA256
107 # define CONFIG_IMAGE_FORMAT_LEGACY
111 #ifdef CONFIG_MXC_UART
112 # define CONFIG_MXC_UART_BASE UART4_BASE
116 #ifdef CONFIG_FSL_USDHC
117 # define CONFIG_SYS_MMC_ENV_DEV 0
118 # define CONFIG_SYS_FSL_USDHC_NUM 1
119 # define CONFIG_SYS_FSL_ESDHC_ADDR 0
123 #ifdef CONFIG_FEC_MXC
124 # define CONFIG_FEC_MXC_PHYADDR 3
125 # define CONFIG_FEC_XCV_TYPE RGMII
128 # define CONFIG_PHYLIB
129 # define CONFIG_PHY_MICREL
130 # define CONFIG_PHY_MICREL_KSZ9021
135 # define CONFIG_SPL_MMC_SUPPORT
136 # include "imx6_spl.h"
137 # ifdef CONFIG_SPL_BUILD
138 # undef CONFIG_DM_GPIO
139 # undef CONFIG_DM_MMC
143 #endif /* __IMX6QLD_ICORE_RQS_CONFIG_H */