include/configs/imx6qdl_icore.h

   1 /*
   2  * Copyright (C) 2016 Amarula Solutions B.V.
   3  * Copyright (C) 2016 Engicam S.r.l.
   4  *
   5  * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __IMX6QLD_ICORE_CONFIG_H
  11 #define __IMX6QLD_ICORE_CONFIG_H
  12
  13 #include <linux/sizes.h>
  14 #include "mx6_common.h"
  15
  16 /* Size of malloc() pool */
  17 #define CONFIG_SYS_MALLOC_LEN           (16 * SZ_1M)
  18
  19 /* Total Size of Environment Sector */
  20 #define CONFIG_ENV_SIZE                 SZ_128K
  21
  22 /* Allow to overwrite serial and ethaddr */
  23 #define CONFIG_ENV_OVERWRITE
  24
  25 /* Environment */
  26 #ifndef CONFIG_ENV_IS_NOWHERE
  27 /* Environment in MMC */
  28 # if defined(CONFIG_ENV_IS_IN_MMC)
  29 #  define CONFIG_ENV_OFFSET             0x100000
  30 /* Environment in NAND */
  31 # elif defined(CONFIG_ENV_IS_IN_NAND)
  32 #  define CONFIG_ENV_OFFSET             0x400000
  33 #  define CONFIG_ENV_SECT_SIZE          CONFIG_ENV_SIZE
  34 # endif
  35 #endif
  36
  37 /* Default environment */
  38 #define CONFIG_EXTRA_ENV_SETTINGS \
  39         "script=boot.scr\0" \
  40         "splashpos=m,m\0" \
  41         "image=uImage\0" \
  42         "console=ttymxc3\0" \
  43         "fdt_high=0xffffffff\0" \
  44         "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  45         "fdt_addr=0x18000000\0" \
  46         "boot_fdt=try\0" \
  47         "mmcdev=0\0" \
  48         "mmcpart=1\0" \
  49         "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
  50         "mmcautodetect=yes\0" \
  51         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  52                 "root=${mmcroot}\0" \
  53         "loadbootscript=" \
  54                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  55         "bootscript=echo Running bootscript from mmc ...; " \
  56                 "source\0" \
  57         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  58         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  59         "mmcboot=echo Booting from mmc ...; " \
  60                 "run mmcargs; " \
  61                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  62                         "if run loadfdt; then " \
  63                                 "bootm ${loadaddr} - ${fdt_addr}; " \
  64                         "else " \
  65                                 "if test ${boot_fdt} = try; then " \
  66                                         "bootm; " \
  67                                 "else " \
  68                                         "echo WARN: Cannot load the DT; " \
  69                                 "fi; " \
  70                         "fi; " \
  71                 "else " \
  72                         "bootm; " \
  73                 "fi\0"
  74
  75 #define CONFIG_BOOTCOMMAND \
  76            "mmc dev ${mmcdev};" \
  77            "mmc dev ${mmcdev}; if mmc rescan; then " \
  78                    "if run loadbootscript; then " \
  79                            "run bootscript; " \
  80                    "else " \
  81                         "if run loadimage; then " \
  82                                 "run mmcboot; " \
  83                         "fi; " \
  84                    "fi; " \
  85            "fi"
  86
  87 /* Miscellaneous configurable options */
  88 #define CONFIG_SYS_MEMTEST_START        0x80000000
  89 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x8000000)
  90
  91 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  92 #define CONFIG_SYS_HZ                   1000
  93
  94 /* Physical Memory Map */
  95 #define CONFIG_NR_DRAM_BANKS            1
  96 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
  97
  98 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
  99 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 100 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 101
 102 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_INIT_RAM_SIZE - \
 103                                         GENERATED_GBL_DATA_SIZE)
 104 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 105                                         CONFIG_SYS_INIT_SP_OFFSET)
 106
 107 /* UART */
 108 #ifdef CONFIG_MXC_UART
 109 # define CONFIG_MXC_UART_BASE           UART4_BASE
 110 #endif
 111
 112 /* MMC */
 113 #ifdef CONFIG_FSL_USDHC
 114 # define CONFIG_SYS_MMC_ENV_DEV         0
 115 # define CONFIG_SYS_FSL_USDHC_NUM       1
 116 # define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC2_BASE_ADDR
 117 #endif
 118
 119 /* NAND */
 120 #ifdef CONFIG_NAND_MXS
 121 # define CONFIG_SYS_MAX_NAND_DEVICE     1
 122 # define CONFIG_SYS_NAND_BASE           0x40000000
 123 # define CONFIG_SYS_NAND_5_ADDR_CYCLE
 124 # define CONFIG_SYS_NAND_ONFI_DETECTION
 125 # define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 126 # define CONFIG_SYS_NAND_U_BOOT_OFFS    0x200000
 127
 128 /* MTD device */
 129 # define CONFIG_MTD_DEVICE
 130 # define CONFIG_CMD_MTDPARTS
 131 # define CONFIG_MTD_PARTITIONS
 132 # define MTDIDS_DEFAULT                 "nand0=nand"
 133 # define MTDPARTS_DEFAULT               "mtdparts=nand:2m(spl),2m(uboot)," \
 134                                         "1m(env),8m(kernel),1m(dtb),-(rootfs)"
 135
 136 # define CONFIG_APBH_DMA
 137 # define CONFIG_APBH_DMA_BURST
 138 # define CONFIG_APBH_DMA_BURST8
 139 #endif
 140
 141 /* Ethernet */
 142 #ifdef CONFIG_FEC_MXC
 143 # define IMX_FEC_BASE                   ENET_BASE_ADDR
 144 # define CONFIG_FEC_MXC_PHYADDR         0
 145 # define CONFIG_FEC_XCV_TYPE            RMII
 146 # define CONFIG_ETHPRIME                "FEC"
 147
 148 # define CONFIG_MII
 149 # define CONFIG_PHYLIB
 150 # define CONFIG_PHY_SMSC
 151 #endif
 152
 153 /* Framebuffer */
 154 #ifdef CONFIG_VIDEO_IPUV3
 155 # define CONFIG_IPUV3_CLK               260000000
 156 # define CONFIG_IMX_VIDEO_SKIP
 157
 158 # define CONFIG_SPLASH_SCREEN
 159 # define CONFIG_SPLASH_SCREEN_ALIGN
 160 # define CONFIG_BMP_16BPP
 161 # define CONFIG_VIDEO_BMP_RLE8
 162 # define CONFIG_VIDEO_LOGO
 163 # define CONFIG_VIDEO_BMP_LOGO
 164 #endif
 165
 166 /* SPL */
 167 #ifdef CONFIG_SPL
 168 # ifdef CONFIG_NAND_MXS
 169 #  define CONFIG_SPL_NAND_SUPPORT
 170 # else
 171 #  define CONFIG_SPL_MMC_SUPPORT
 172 # endif
 173
 174 # include "imx6_spl.h"
 175 # ifdef CONFIG_SPL_BUILD
 176 #  undef CONFIG_DM_GPIO
 177 #  undef CONFIG_DM_MMC
 178 # endif
 179 #endif
 180
 181 #endif /* __IMX6QLD_ICORE_CONFIG_H */