2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
5 * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits.
7 * SPDX-License-Identifier: GPL-2.0+
10 #ifndef __IMX6QLD_ICORE_CONFIG_H
11 #define __IMX6QLD_ICORE_CONFIG_H
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
16 /* Size of malloc() pool */
17 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
19 /* Total Size of Environment Sector */
20 #define CONFIG_ENV_SIZE SZ_128K
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
26 #ifndef CONFIG_ENV_IS_NOWHERE
27 /* Environment in MMC */
28 # if defined(CONFIG_ENV_IS_IN_MMC)
29 # define CONFIG_ENV_OFFSET 0x100000
30 /* Environment in NAND */
31 # elif defined(CONFIG_ENV_IS_IN_NAND)
32 # define CONFIG_ENV_OFFSET 0x400000
33 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
37 /* Default environment */
38 #define CONFIG_EXTRA_ENV_SETTINGS \
42 "fit_image=fit.itb\0" \
44 "fdt_high=0xffffffff\0" \
45 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
46 "fdt_addr=0x18000000\0" \
50 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
51 "nandroot=ubi0:rootfs rootfstype=ubifs\0" \
52 "mmcautodetect=yes\0" \
53 "mmcargs=setenv bootargs console=${console},${baudrate} " \
55 "ubiargs=setenv bootargs console=${console},${baudrate} " \
56 "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
58 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
59 "bootscript=echo Running bootscript from mmc ...; " \
61 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
62 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
63 "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
64 "fitboot=echo Booting FIT image from mmc ...; " \
66 "bootm ${loadaddr}\0" \
67 "_mmcboot=run mmcargs; " \
69 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
70 "if run loadfdt; then " \
71 "bootm ${loadaddr} - ${fdt_addr}; " \
73 "if test ${boot_fdt} = try; then " \
76 "echo WARN: Cannot load the DT; " \
82 "mmcboot=echo Booting from mmc ...; " \
83 "if mmc rescan; then " \
84 "if run loadbootscript; then " \
87 "if run loadfit; then " \
90 "if run loadimage; then " \
96 "nandboot=echo Booting from nand ...; " \
97 "if mtdparts; then " \
98 "echo Starting nand boot ...; " \
100 "mtdparts default; " \
103 "nand read ${loadaddr} kernel 0x800000; " \
104 "nand read ${fdt_addr} dtb 0x100000; " \
105 "bootm ${loadaddr} - ${fdt_addr}\0"
107 #define CONFIG_BOOTCOMMAND "run $modeboot"
109 /* Miscellaneous configurable options */
110 #define CONFIG_SYS_MEMTEST_START 0x80000000
111 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
113 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
114 #define CONFIG_SYS_HZ 1000
116 /* Physical Memory Map */
117 #define CONFIG_NR_DRAM_BANKS 1
118 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
120 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
121 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
122 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
124 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
125 GENERATED_GBL_DATA_SIZE)
126 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
127 CONFIG_SYS_INIT_SP_OFFSET)
131 # define CONFIG_HASH_VERIFY
133 # define CONFIG_SHA256
134 # define CONFIG_IMAGE_FORMAT_LEGACY
138 #ifdef CONFIG_MXC_UART
139 # define CONFIG_MXC_UART_BASE UART4_BASE
143 #ifdef CONFIG_FSL_USDHC
144 # define CONFIG_SYS_MMC_ENV_DEV 0
145 # define CONFIG_SYS_FSL_USDHC_NUM 1
146 # define CONFIG_SYS_FSL_ESDHC_ADDR 0
150 #ifdef CONFIG_NAND_MXS
151 # define CONFIG_SYS_MAX_NAND_DEVICE 1
152 # define CONFIG_SYS_NAND_BASE 0x40000000
153 # define CONFIG_SYS_NAND_5_ADDR_CYCLE
154 # define CONFIG_SYS_NAND_ONFI_DETECTION
155 # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
156 # define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
159 # define CONFIG_MTD_DEVICE
160 # define CONFIG_CMD_MTDPARTS
161 # define CONFIG_MTD_PARTITIONS
162 # define MTDIDS_DEFAULT "nand0=gpmi-nand"
163 # define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
164 "1m(env),8m(kernel),1m(dtb),-(rootfs)"
167 # define CONFIG_CMD_UBIFS
168 # define CONFIG_RBTREE
171 # define CONFIG_APBH_DMA
172 # define CONFIG_APBH_DMA_BURST
173 # define CONFIG_APBH_DMA_BURST8
177 #ifdef CONFIG_FEC_MXC
178 # define IMX_FEC_BASE ENET_BASE_ADDR
179 # define CONFIG_FEC_MXC_PHYADDR 0
180 # define CONFIG_FEC_XCV_TYPE RMII
181 # define CONFIG_ETHPRIME "FEC"
184 # define CONFIG_PHYLIB
185 # define CONFIG_PHY_SMSC
189 #ifdef CONFIG_VIDEO_IPUV3
190 # define CONFIG_IPUV3_CLK 260000000
191 # define CONFIG_IMX_VIDEO_SKIP
193 # define CONFIG_SPLASH_SCREEN
194 # define CONFIG_SPLASH_SCREEN_ALIGN
195 # define CONFIG_BMP_16BPP
196 # define CONFIG_VIDEO_BMP_RLE8
197 # define CONFIG_VIDEO_LOGO
198 # define CONFIG_VIDEO_BMP_LOGO
203 # ifdef CONFIG_NAND_MXS
204 # define CONFIG_SPL_NAND_SUPPORT
206 # define CONFIG_SPL_MMC_SUPPORT
209 # include "imx6_spl.h"
210 # ifdef CONFIG_SPL_BUILD
211 # undef CONFIG_DM_GPIO
212 # undef CONFIG_DM_MMC
216 #endif /* __IMX6QLD_ICORE_CONFIG_H */