1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014 Gateworks Corporation
4 * Author: Tim Harvey <tharvey@gateworks.com>
6 #ifndef __IMX6_SPL_CONFIG_H
7 #define __IMX6_SPL_CONFIG_H
11 #ifdef CONFIG_MX6_OCRAM_256KB
13 * see Figure 8.4.1 in IMX6DQ Reference manuals:
14 * - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
15 * - BOOT ROM stack is at 0x0093FFB8
16 * - if icache/dcache is enabled (eFuse/strapping controlled) then the
17 * IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
18 * fit between 0x00907000 and 0x00938000.
19 * - Additionally the BOOT ROM loads what they consider the firmware image
20 * which consists of a 4K header in front of us that contains the IVT, DCD
21 * and some padding thus 'our' max size is really 0x00908000 - 0x00938000
25 * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
26 * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
27 * boot media (given that boot media specific offset is configured properly).
31 * see Figure 8-3 in IMX6SDL Reference manuals:
32 * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
33 * - BOOT ROM stack is at 0x0091FFB8
34 * - if icache/dcache is enabled (eFuse/strapping controlled) then the
35 * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
36 * fit between 0x00907000 and 0x00918000.
37 * - Additionally the BOOT ROM loads what they consider the firmware image
38 * which consists of a 4K header in front of us that contains the IVT, DCD
39 * and some padding thus 'our' max size is really 0x00908000 - 0x00918000
43 * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
44 * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
45 * boot media (given that boot media specific offset is configured properly).
51 #if defined(CONFIG_SPL_MMC)
52 #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
56 #if defined(CONFIG_SPL_SATA)
57 #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
60 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
61 defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
62 #define CONFIG_SPL_BSS_START_ADDR 0x88200000
63 #define CONFIG_SYS_SPL_MALLOC_START 0x88300000
64 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
66 #define CONFIG_SPL_BSS_START_ADDR 0x18200000
67 #define CONFIG_SYS_SPL_MALLOC_START 0x18300000
68 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */