4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
7 * Configuration settings for the phyCORE-i.MX31 board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/arch/imx-regs.h>
33 /* High Level Configuration Options */
34 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */
35 #define CONFIG_MX31 /* in a mx31 */
36 #define CONFIG_MX31_HCLK_FREQ 26000000
37 #define CONFIG_MX31_CLK32 32000
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
42 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43 #define CONFIG_SETUP_MEMORY_TAGS
44 #define CONFIG_INITRD_TAG
47 * Size of malloc() pool
49 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024)
55 #define CONFIG_HARD_I2C
56 #define CONFIG_I2C_MXC
57 #define CONFIG_SYS_I2C_MX31_PORT2
58 #define CONFIG_SYS_I2C_SPEED 100000
59 #define CONFIG_SYS_I2C_SLAVE 0xfe
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE UART1_BASE
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_CONS_INDEX 1
67 #define CONFIG_BAUDRATE 115200
68 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
70 /***********************************************************
72 ***********************************************************/
74 #include <config_cmd_default.h>
76 #define CONFIG_CMD_PING
77 #define CONFIG_CMD_EEPROM
78 #define CONFIG_CMD_I2C
80 #define CONFIG_BOOTDELAY 3
82 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \
83 "1536k(kernel),-(root)"
85 #define CONFIG_NETMASK 255.255.255.0
86 #define CONFIG_IPADDR 192.168.23.168
87 #define CONFIG_SERVERIP 192.168.23.2
89 #define CONFIG_EXTRA_ENV_SETTINGS \
90 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
91 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
92 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
93 "bootargs_flash=setenv bootargs $(bootargs) " \
94 "root=/dev/mtdblock2 rootfstype=jffs2\0" \
95 "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
96 "bootcmd=run bootcmd_net\0" \
97 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \
98 "tftpboot 0x80000000 $(uimage);bootm\0" \
99 "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \
100 "bootm 0x80000000\0" \
102 "mtdparts=" MTDPARTS_DEFAULT "\0" \
103 "prg_uboot=tftpboot 0x80000000 $(uboot);" \
104 "protect off 0xa0000000 +0x20000;" \
105 "erase 0xa0000000 +0x20000;" \
106 "cp.b 0x80000000 0xa0000000 $(filesize)\0" \
107 "prg_kernel=tftpboot 0x80000000 $(uimage);" \
108 "erase 0xa0040000 +0x180000;" \
109 "cp.b 0x80000000 0xa0040000 $(filesize)\0" \
110 "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \
111 "erase 0xa01c0000 0xa1ffffff;" \
112 "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
113 "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \
114 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \
115 "sync:1241513985,vmode:0\0"
118 #define CONFIG_SMC911X
119 #define CONFIG_SMC911X_BASE 0xa8000000
120 #define CONFIG_SMC911X_32_BIT
123 * Miscellaneous configurable options
125 #define CONFIG_SYS_LONGHELP /* undef to save memory */
126 #define CONFIG_SYS_PROMPT "uboot> "
127 /* Console I/O Buffer Size */
128 #define CONFIG_SYS_CBSIZE 256
129 /* Print Buffer Size */
130 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
131 sizeof(CONFIG_SYS_PROMPT) + 16)
132 /* max number of command args */
133 #define CONFIG_SYS_MAXARGS 16
134 /* Boot Argument Buffer Size */
135 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
137 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
138 #define CONFIG_SYS_MEMTEST_END 0x10000
140 #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
142 #define CONFIG_SYS_HZ 1000
144 #define CONFIG_CMDLINE_EDITING
149 * The stack sizes are set up in start.S using the settings below
151 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
154 * Physical Memory Map
156 #define CONFIG_NR_DRAM_BANKS 1
157 #define PHYS_SDRAM_1 0x80000000
158 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
159 #define CONFIG_BOARD_EARLY_INIT_F
160 #define CONFIG_SYS_TEXT_BASE 0xA0000000
162 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
163 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
164 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
165 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
166 GENERATED_GBL_DATA_SIZE)
167 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
168 CONFIG_SYS_GBL_DATA_OFFSET)
171 * FLASH and environment organization
173 #define CONFIG_SYS_FLASH_BASE 0xa0000000
174 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
175 #define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */
176 /* Monitor at beginning of flash */
177 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
179 #define CONFIG_ENV_IS_IN_EEPROM
180 #define CONFIG_ENV_OFFSET 0x00 /* env. starts here */
181 #define CONFIG_ENV_SIZE 4096
182 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
183 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
184 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */
185 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */
188 * CFI FLASH driver setup
190 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
191 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */
192 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
193 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
196 * Timeout for Flash Erase and Flash Write
197 * timeout values are in ticks
199 #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ)
200 #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ)
205 #undef CONFIG_CMD_MTDPARTS
206 #define CONFIG_JFFS2_DEV "nor0"
208 /* EET platform additions */
209 #ifdef CONFIG_IMX31_PHYCORE_EET
210 #define CONFIG_BOARD_LATE_INIT
212 #define CONFIG_MXC_GPIO
214 #define CONFIG_HARD_SPI
215 #define CONFIG_MXC_SPI
216 #define CONFIG_CMD_SPI
218 #define CONFIG_S6E63D6
221 #define CONFIG_CFB_CONSOLE
222 #define CONFIG_VIDEO_MX3
223 #define CONFIG_VIDEO_LOGO
224 #define CONFIG_VIDEO_SW_CURSOR
225 #define CONFIG_VGA_AS_SINGLE_DEVICE
226 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
227 #define CONFIG_SPLASH_SCREEN
228 #define CONFIG_CMD_BMP
229 #define CONFIG_BMP_16BPP
232 #endif /* __CONFIG_H */