4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
7 * Configuration settings for the 242x TI H4 board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 /* High Level Configuration Options */
32 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
33 #define CONFIG_MX31 1 /* in a mx31 */
34 #define CONFIG_MX31_HCLK_FREQ 26000000
35 #define CONFIG_MX31_CLK32 32000
37 #define CONFIG_DISPLAY_CPUINFO
38 #define CONFIG_DISPLAY_BOARDINFO
40 /* Temporarily disabled */
42 #define CONFIG_OF_LIBFDT 1
44 #define CONFIG_FIT_VERBOSE 1
47 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS 1
49 #define CONFIG_INITRD_TAG 1
52 * Size of malloc() pool
54 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
55 #define CFG_GBL_DATA_SIZE 128 /* num bytes reserved for initial data */
61 #define CONFIG_MX31_UART 1
62 #define CFG_MX31_UART1 1
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_CONS_INDEX 1
67 #define CONFIG_BAUDRATE 115200
68 #define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
70 /***********************************************************
72 ***********************************************************/
74 #include <config_cmd_default.h>
76 #define CONFIG_CMD_MII
77 #define CONFIG_CMD_PING
79 #define CONFIG_BOOTDELAY 3
81 #define CONFIG_NETMASK 255.255.255.0
82 #define CONFIG_IPADDR 192.168.23.168
83 #define CONFIG_SERVERIP 192.168.23.2
85 #define CONFIG_EXTRA_ENV_SETTINGS \
86 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
87 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
88 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs), v3, tcp\0" \
89 "bootcmd=run bootcmd_net\0" \
90 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \
91 "tftpboot 0x80000000 uImage-mx31; bootm\0" \
92 "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; " \
93 "protect off all; erase 0xa00d0000 0xa01effff; " \
94 "cp.b 0x80000000 0xa00d0000 $(filesize)\0"
96 #define CONFIG_DRIVER_SMC911X 1
97 #define CONFIG_DRIVER_SMC911X_BASE 0xb4020000
100 * Miscellaneous configurable options
102 #define CFG_LONGHELP /* undef to save memory */
103 #define CFG_PROMPT "uboot> "
104 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
105 /* Print Buffer Size */
106 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
107 #define CFG_MAXARGS 16 /* max number of command args */
108 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
110 #define CFG_MEMTEST_START 0 /* memtest works on */
111 #define CFG_MEMTEST_END 0x10000
113 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
115 #define CFG_LOAD_ADDR 0 /* default load address */
119 #define CONFIG_CMDLINE_EDITING 1
121 /*-----------------------------------------------------------------------
124 * The stack sizes are set up in start.S using the settings below
126 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
128 /*-----------------------------------------------------------------------
129 * Physical Memory Map
131 #define CONFIG_NR_DRAM_BANKS 1
132 #define PHYS_SDRAM_1 0x80000000
133 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
135 /*-----------------------------------------------------------------------
136 * FLASH and environment organization
138 #define CFG_FLASH_BASE 0xa0000000
139 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
140 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
141 /* Monitor at beginning of flash */
142 #define CFG_MONITOR_BASE CFG_FLASH_BASE
144 #define CFG_ENV_ADDR 0xa01f0000
145 #define CFG_ENV_IS_IN_FLASH 1
146 #define CFG_ENV_SECT_SIZE (64 * 1024)
147 #define CFG_ENV_SIZE (64 * 1024)
149 /*-----------------------------------------------------------------------
150 * CFI FLASH driver setup
152 #define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
153 #define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
154 #define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
155 #define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
157 /* timeout values are in ticks */
158 #define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
159 #define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
164 #undef CONFIG_JFFS2_CMDLINE
165 #define CONFIG_JFFS2_DEV "nor0"
167 #endif /* __CONFIG_H */