4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
7 * Configuration settings for the LogicPD i.MX31 Litekit board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/arch/mx31-regs.h>
33 /* High Level Configuration Options */
34 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
35 #define CONFIG_MX31 1 /* in a mx31 */
36 #define CONFIG_MX31_HCLK_FREQ 26000000
37 #define CONFIG_MX31_CLK32 32000
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
42 /* Temporarily disabled */
44 #define CONFIG_OF_LIBFDT 1
46 #define CONFIG_FIT_VERBOSE 1
49 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50 #define CONFIG_SETUP_MEMORY_TAGS 1
51 #define CONFIG_INITRD_TAG 1
54 * Size of malloc() pool
56 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
57 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
63 #define CONFIG_MX31_UART 1
64 #define CFG_MX31_UART1 1
66 #define CONFIG_HARD_SPI 1
67 #define CONFIG_MXC_SPI 1
68 #define CONFIG_DEFAULT_SPI_BUS 1
69 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
71 #define CONFIG_RTC_MC13783 1
73 /* allow to overwrite serial and ethaddr */
74 #define CONFIG_ENV_OVERWRITE
75 #define CONFIG_CONS_INDEX 1
76 #define CONFIG_BAUDRATE 115200
77 #define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
79 /***********************************************************
81 ***********************************************************/
83 #include <config_cmd_default.h>
85 #define CONFIG_CMD_MII
86 #define CONFIG_CMD_PING
87 #define CONFIG_CMD_SPI
88 #define CONFIG_CMD_DATE
90 #define CONFIG_BOOTDELAY 3
92 #define CONFIG_NETMASK 255.255.255.0
93 #define CONFIG_IPADDR 192.168.23.168
94 #define CONFIG_SERVERIP 192.168.23.2
96 #define CONFIG_EXTRA_ENV_SETTINGS \
97 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
98 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
99 "bootcmd=run bootcmd_net\0" \
100 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \
101 "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
104 #define CONFIG_DRIVER_SMC911X 1
105 #define CONFIG_DRIVER_SMC911X_BASE (CS4_BASE + 0x00020000)
106 #define CONFIG_DRIVER_SMC911X_32_BIT 1
109 * Miscellaneous configurable options
111 #define CFG_LONGHELP /* undef to save memory */
112 #define CFG_PROMPT "uboot> "
113 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
114 /* Print Buffer Size */
115 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
116 #define CFG_MAXARGS 16 /* max number of command args */
117 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
119 #define CFG_MEMTEST_START 0 /* memtest works on */
120 #define CFG_MEMTEST_END 0x10000
122 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
124 #define CFG_LOAD_ADDR 0 /* default load address */
128 #define CONFIG_CMDLINE_EDITING 1
130 /*-----------------------------------------------------------------------
133 * The stack sizes are set up in start.S using the settings below
135 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
137 /*-----------------------------------------------------------------------
138 * Physical Memory Map
140 #define CONFIG_NR_DRAM_BANKS 1
141 #define PHYS_SDRAM_1 CSD0_BASE
142 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
144 /*-----------------------------------------------------------------------
145 * FLASH and environment organization
147 #define CFG_FLASH_BASE CS0_BASE
148 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
149 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
150 #define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
152 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x001f0000)
153 #define CONFIG_ENV_IS_IN_FLASH 1
154 #define CFG_ENV_SECT_SIZE (64 * 1024)
155 #define CFG_ENV_SIZE (64 * 1024)
157 /*-----------------------------------------------------------------------
158 * CFI FLASH driver setup
160 #define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
161 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
162 #define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
163 #define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
165 /* timeout values are in ticks */
166 #define CFG_FLASH_ERASE_TOUT (100*CFG_HZ) /* Timeout for Flash Erase */
167 #define CFG_FLASH_WRITE_TOUT (100*CFG_HZ) /* Timeout for Flash Write */
172 #undef CONFIG_JFFS2_CMDLINE
173 #define CONFIG_JFFS2_DEV "nor0"
175 #endif /* __CONFIG_H */