4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
7 * Configuration settings for the LogicPD i.MX31 Litekit board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/arch/mx31-regs.h>
33 /* High Level Configuration Options */
34 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
35 #define CONFIG_MX31 1 /* in a mx31 */
36 #define CONFIG_MX31_HCLK_FREQ 26000000
37 #define CONFIG_MX31_CLK32 32000
39 #define CONFIG_DISPLAY_CPUINFO
40 #define CONFIG_DISPLAY_BOARDINFO
42 /* Temporarily disabled */
44 #define CONFIG_OF_LIBFDT 1
46 #define CONFIG_FIT_VERBOSE 1
49 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50 #define CONFIG_SETUP_MEMORY_TAGS 1
51 #define CONFIG_INITRD_TAG 1
54 * Size of malloc() pool
56 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
57 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
63 #define CONFIG_MXC_UART 1
64 #define CONFIG_SYS_MX31_UART1 1
66 #define CONFIG_HARD_SPI 1
67 #define CONFIG_MXC_SPI 1
68 #define CONFIG_DEFAULT_SPI_BUS 1
69 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
71 #define CONFIG_FSL_PMIC
72 #define CONFIG_FSL_PMIC_BUS 1
73 #define CONFIG_FSL_PMIC_CS 0
74 #define CONFIG_FSL_PMIC_CLK 1000000
75 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
77 #define CONFIG_RTC_MC13783 1
79 /* allow to overwrite serial and ethaddr */
80 #define CONFIG_ENV_OVERWRITE
81 #define CONFIG_CONS_INDEX 1
82 #define CONFIG_BAUDRATE 115200
83 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
85 /***********************************************************
87 ***********************************************************/
89 #include <config_cmd_default.h>
91 #define CONFIG_CMD_MII
92 #define CONFIG_CMD_PING
93 #define CONFIG_CMD_SPI
94 #define CONFIG_CMD_DATE
95 #define CONFIG_CMD_NAND
97 #define CONFIG_BOOTDELAY 3
99 #define CONFIG_NETMASK 255.255.255.0
100 #define CONFIG_IPADDR 192.168.23.168
101 #define CONFIG_SERVERIP 192.168.23.2
103 #define CONFIG_EXTRA_ENV_SETTINGS \
104 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
105 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
106 "bootcmd=run bootcmd_net\0" \
107 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \
108 "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
111 #define CONFIG_NET_MULTI
112 #define CONFIG_SMC911X 1
113 #define CONFIG_SMC911X_BASE (CS4_BASE + 0x00020000)
114 #define CONFIG_SMC911X_32_BIT 1
117 * Miscellaneous configurable options
119 #define CONFIG_SYS_LONGHELP /* undef to save memory */
120 #define CONFIG_SYS_PROMPT "uboot> "
121 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
122 /* Print Buffer Size */
123 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
124 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
125 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
127 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
128 #define CONFIG_SYS_MEMTEST_END 0x10000
130 #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
132 #define CONFIG_SYS_HZ 1000
134 #define CONFIG_CMDLINE_EDITING 1
136 /*-----------------------------------------------------------------------
139 * The stack sizes are set up in start.S using the settings below
141 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
143 /*-----------------------------------------------------------------------
144 * Physical Memory Map
146 #define CONFIG_NR_DRAM_BANKS 1
147 #define PHYS_SDRAM_1 CSD0_BASE
148 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
150 /*-----------------------------------------------------------------------
151 * FLASH and environment organization
153 #define CONFIG_SYS_FLASH_BASE CS0_BASE
154 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
155 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
156 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
158 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x001f0000)
159 #define CONFIG_ENV_IS_IN_FLASH 1
160 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
161 #define CONFIG_ENV_SIZE (64 * 1024)
163 /*-----------------------------------------------------------------------
164 * CFI FLASH driver setup
166 #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
167 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
168 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
169 #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
171 /* timeout values are in ticks */
172 #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
173 #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
178 #undef CONFIG_CMD_MTDPARTS
179 #define CONFIG_JFFS2_DEV "nor0"
184 #define CONFIG_NAND_MXC
185 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR
186 #define CONFIG_SYS_MAX_NAND_DEVICE 1
187 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
188 #define CONFIG_MXC_NAND_HWECC
190 #endif /* __CONFIG_H */