include/configs/imx27lite-common.h

   1 /*
   2  * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
   3  *
   4  * based on:
   5  * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __IMX27LITE_COMMON_CONFIG_H
  24 #define __IMX27LITE_COMMON_CONFIG_H
  25
  26 /*
  27  * SoC Configuration
  28  */
  29 #define CONFIG_ARM926EJS                        /* arm926ejs CPU core */
  30 #define CONFIG_MX27
  31 #define CONFIG_MX27_CLK32       32768           /* OSC32K frequency */
  32 #define CONFIG_SYS_HZ           1000
  33
  34 #define CONFIG_DISPLAY_BOARDINFO
  35 #define CONFIG_DISPLAY_CPUINFO
  36
  37 #define CONFIG_SYS_TEXT_BASE            0xc0000000
  38
  39 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  40 #define CONFIG_SETUP_MEMORY_TAGS        1
  41 #define CONFIG_INITRD_TAG               1
  42
  43 /*
  44  * Lowlevel configuration
  45  */
  46 #define SDRAM_ESDCFG_REGISTER_VAL(cas)  \
  47                 (ESDCFG_TRC(10) |       \
  48                 ESDCFG_TRCD(3) |        \
  49                 ESDCFG_TCAS(cas) |      \
  50                 ESDCFG_TRRD(1) |        \
  51                 ESDCFG_TRAS(5) |        \
  52                 ESDCFG_TWR |            \
  53                 ESDCFG_TMRD(2) |        \
  54                 ESDCFG_TRP(2) |         \
  55                 ESDCFG_TXP(3))
  56
  57 #define SDRAM_ESDCTL_REGISTER_VAL       \
  58                 (ESDCTL_PRCT(0) |       \
  59                  ESDCTL_BL |            \
  60                  ESDCTL_PWDT(0) |       \
  61                  ESDCTL_SREFR(3) |      \
  62                  ESDCTL_DSIZ_32 |       \
  63                  ESDCTL_COL10 |         \
  64                  ESDCTL_ROW13 |         \
  65                  ESDCTL_SDE)
  66
  67 #define SDRAM_ALL_VAL           0xf00
  68
  69 #define SDRAM_MODE_REGISTER_VAL 0x33    /* BL: 8, CAS: 3 */
  70 #define SDRAM_EXT_MODE_REGISTER_VAL     0x1000000
  71
  72 #define MPCTL0_VAL      0x1ef15d5
  73
  74 #define SPCTL0_VAL      0x043a1c09
  75
  76 #define CSCR_VAL        0x33f08107
  77
  78 #define PCDR0_VAL       0x120470c3
  79 #define PCDR1_VAL       0x03030303
  80 #define PCCR0_VAL       0xffffffff
  81 #define PCCR1_VAL       0xfffffffc
  82
  83 #define AIPI1_PSR0_VAL  0x20040304
  84 #define AIPI1_PSR1_VAL  0xdffbfcfb
  85 #define AIPI2_PSR0_VAL  0x07ffc200
  86 #define AIPI2_PSR1_VAL  0xffffffff
  87
  88 /*
  89  * Memory Info
  90  */
  91 /* malloc() len */
  92 #define CONFIG_SYS_MALLOC_LEN           (0x10000 + 512 * 1024)
  93 /* memtest start address */
  94 #define CONFIG_SYS_MEMTEST_START        0xA0000000
  95 #define CONFIG_SYS_MEMTEST_END          0xA1000000      /* 16MB RAM test */
  96 #define CONFIG_NR_DRAM_BANKS    1               /* we have 1 bank of DRAM */
  97 #define PHYS_SDRAM_1            0xA0000000      /* DDR Start */
  98 #define PHYS_SDRAM_1_SIZE       0x08000000      /* DDR size 128MB */
  99
 100 /*
 101  * Serial Driver info
 102  */
 103 #define CONFIG_MXC_UART
 104 #define CONFIG_MXC_UART_BASE    UART1_BASE
 105 #define CONFIG_CONS_INDEX       1               /* use UART0 for console */
 106 #define CONFIG_BAUDRATE         115200          /* Default baud rate */
 107
 108 /*
 109  * Flash & Environment
 110  */
 111 #define CONFIG_ENV_IS_IN_FLASH
 112 #define CONFIG_FLASH_CFI_DRIVER
 113 #define CONFIG_SYS_FLASH_CFI
 114 /* Use buffered writes (~10x faster) */
 115 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 116 /* Use hardware sector protection */
 117 #define CONFIG_SYS_FLASH_PROTECTION             1
 118 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of flash banks */
 119 /* CS2 Base address */
 120 #define PHYS_FLASH_1                    0xc0000000
 121 /* Flash Base for U-Boot */
 122 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 123 #define CONFIG_SYS_MAX_FLASH_SECT       (PHYS_FLASH_SIZE / \
 124                 CONFIG_SYS_FLASH_SECT_SZ)
 125 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 126 #define CONFIG_SYS_MONITOR_LEN          0x40000         /* Reserve 256KiB */
 127 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 128 /* Address and size of Redundant Environment Sector     */
 129 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 130 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 131
 132 /*
 133  * Ethernet
 134  */
 135 #define CONFIG_FEC_MXC
 136 #define CONFIG_FEC_MXC_PHYADDR          0x1f
 137 #define CONFIG_MII
 138
 139 /*
 140  * MTD
 141  */
 142 #define CONFIG_FLASH_CFI_MTD
 143 #define CONFIG_MTD_DEVICE
 144
 145 /*
 146  * NAND
 147  */
 148 #define CONFIG_NAND_MXC
 149 #define CONFIG_MXC_NAND_REGS_BASE       0xd8000000
 150 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 151 #define CONFIG_SYS_NAND_BASE            0xd8000000
 152 #define CONFIG_JFFS2_NAND
 153 #define CONFIG_MXC_NAND_HWECC
 154
 155 /*
 156  * SD/MMC
 157  */
 158 #define CONFIG_MMC
 159 #define CONFIG_GENERIC_MMC
 160 #define CONFIG_MXC_MMC
 161 #define CONFIG_DOS_PARTITION
 162
 163 /*
 164  * GPIO
 165  */
 166 #define CONFIG_MXC_GPIO
 167
 168 /*
 169  * MTD partitions
 170  */
 171 #define CONFIG_CMD_MTDPARTS
 172
 173 /*
 174  * U-Boot general configuration
 175  */
 176 #define CONFIG_SYS_PROMPT       "=> "   /* Monitor Command Prompt */
 177 #define CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size  */
 178 /* Print buffer sz */
 179 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
 180                 sizeof(CONFIG_SYS_PROMPT) + 16)
 181 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 182 /* Boot Argument Buffer Size */
 183 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
 184 #define CONFIG_CMDLINE_EDITING
 185 #define CONFIG_SYS_LONGHELP
 186
 187 /*
 188  * U-Boot commands
 189  */
 190 #include <config_cmd_default.h>
 191 #define CONFIG_CMD_ASKENV
 192 #define CONFIG_CMD_CACHE
 193 #define CONFIG_CMD_DHCP
 194 #define CONFIG_CMD_DIAG
 195 #define CONFIG_CMD_FAT
 196 #define CONFIG_CMD_JFFS2
 197 #define CONFIG_CMD_MII
 198 #define CONFIG_CMD_MMC
 199 #define CONFIG_CMD_NAND
 200 #define CONFIG_CMD_PING
 201
 202 #define CONFIG_BOOTDELAY        5
 203
 204 #define CONFIG_LOADADDR         0xa0800000      /* loadaddr env var */
 205 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 206
 207 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 208         "netdev=eth0\0"                                                 \
 209         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 210                 "nfsroot=${serverip}:${rootpath}\0"                     \
 211         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 212         "addip=setenv bootargs ${bootargs} "                            \
 213                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 214                 ":${hostname}:${netdev}:off panic=1\0"                  \
 215         "addtty=setenv bootargs ${bootargs}"                            \
 216                 " console=ttymxc0,${baudrate}\0"                        \
 217         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 218         "addmisc=setenv bootargs ${bootargs}\0"                         \
 219         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"          \
 220         "kernel_addr_r=a0800000\0"                                      \
 221         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 222         "rootpath=/opt/eldk-4.2-arm/arm\0"                              \
 223         "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 224                 "run nfsargs addip addtty addmtd addmisc;"              \
 225                 "bootm\0"                                               \
 226         "bootcmd=run net_nfs\0"                                         \
 227         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 228         "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 229                 " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
 230                 " +${filesize};cp.b ${fileaddr} "                       \
 231                 __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"   \
 232         "upd=run load update\0"                                         \
 233         "mtdids=" MTDIDS_DEFAULT "\0"                                   \
 234         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
 235
 236 /* additions for new relocation code, must be added to all boards */
 237 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 238 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
 239                                         GENERATED_GBL_DATA_SIZE)
 240 #endif /* __IMX27LITE_COMMON_CONFIG_H */