1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016, Imagination Technologies Ltd.
5 * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
7 * Imagination Technologies Ltd. MIPSfpga
10 #ifndef __XILFPGA_CONFIG_H
11 #define __XILFPGA_CONFIG_H
13 /* BootROM + MIG is pretty smart. DDR and Cache initialized */
15 /*--------------------------------------------
19 #define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
21 /*----------------------------------------------------------------------
25 /* SDRAM Configuration (for final code, data, stack, heap) */
26 #define CONFIG_SYS_SDRAM_BASE 0x80000000
27 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */
28 #define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
31 /*----------------------------------------------------------------------
35 /*------------------------------------------------------------
36 * Console Configuration
38 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
40 /* -------------------------------------------------
44 /* ---------------------------------------------------------------------
45 * Board boot configuration
48 #endif /* __XILFPGA_CONFIG_H */