2 * Copyright (C) 2016, Imagination Technologies Ltd.
4 * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
6 * SPDX-License-Identifier: GPL-2.0+
8 * Imagination Technologies Ltd. MIPSfpga
11 #ifndef __XILFPGA_CONFIG_H
12 #define __XILFPGA_CONFIG_H
14 /* BootROM + MIG is pretty smart. DDR and Cache initialized */
15 #define CONFIG_SKIP_LOWLEVEL_INIT
17 /*--------------------------------------------
21 #define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
23 /* Cache Configuration */
24 #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
26 /*----------------------------------------------------------------------
30 /* SDRAM Configuration (for final code, data, stack, heap) */
31 #define CONFIG_SYS_SDRAM_BASE 0x80000000
32 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */
33 #define CONFIG_SYS_INIT_SP_ADDR \
34 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
36 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
37 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */
40 /*----------------------------------------------------------------------
43 #define CONFIG_SYS_LONGHELP /* undef to save memory */
45 /*------------------------------------------------------------
46 * Console Configuration
48 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
50 /* -------------------------------------------------
53 #define CONFIG_ENV_SIZE 0x4000
55 /* ---------------------------------------------------------------------
56 * Board boot configuration
58 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
60 #endif /* __XILFPGA_CONFIG_H */