a555e5a190602ec73b1f5e65fde074711c995e56
[platform/kernel/u-boot.git] / include / configs / igep00x0.h
1 /*
2  * Common configuration settings for IGEP technology based boards
3  *
4  * (C) Copyright 2012
5  * ISEE 2007 SL, <www.iseebcn.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+ 
8  */
9
10 #ifndef __IGEP00X0_H
11 #define __IGEP00X0_H
12
13 #include <asm/sizes.h>
14
15 /*
16  * High Level Configuration Options
17  */
18 #define CONFIG_OMAP             1       /* in a TI OMAP core */
19 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
20 #define CONFIG_OMAP_GPIO
21 #define CONFIG_OMAP_COMMON
22
23 #define CONFIG_SDRC     /* The chip has SDRC controller */
24
25 #include <asm/arch/cpu.h>
26 #include <asm/arch/omap3.h>
27 #include <asm/mach-types.h>
28
29 /*
30  * Display CPU and Board information
31  */
32 #define CONFIG_DISPLAY_CPUINFO          1
33 #define CONFIG_DISPLAY_BOARDINFO        1
34
35 /* Clock Defines */
36 #define V_OSCK                  26000000        /* Clock output from T2 */
37 #define V_SCLK                  (V_OSCK >> 1)
38
39 #define CONFIG_MISC_INIT_R
40
41 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
42 #define CONFIG_SETUP_MEMORY_TAGS        1
43 #define CONFIG_INITRD_TAG               1
44 #define CONFIG_REVISION_TAG             1
45
46 #define CONFIG_OF_LIBFDT
47 #define CONFIG_CMD_BOOTZ
48
49 /*
50  * NS16550 Configuration
51  */
52
53 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
54
55 #define CONFIG_SYS_NS16550
56 #define CONFIG_SYS_NS16550_SERIAL
57 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
58 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
59
60 /* select serial console configuration */
61 #define CONFIG_CONS_INDEX               3
62 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
63 #define CONFIG_SERIAL3                  3
64
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_BAUDRATE                 115200
68 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
69                                         115200}
70 #define CONFIG_GENERIC_MMC              1
71 #define CONFIG_MMC                      1
72 #define CONFIG_OMAP_HSMMC               1
73 #define CONFIG_DOS_PARTITION            1
74
75 /* define to enable boot progress via leds */
76 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
77     (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
78 #define CONFIG_SHOW_BOOT_PROGRESS
79 #endif
80
81 /* USB */
82 #define CONFIG_MUSB_UDC                 1
83 #define CONFIG_USB_OMAP3                1
84 #define CONFIG_TWL4030_USB              1
85
86 /* USB device configuration */
87 #define CONFIG_USB_DEVICE               1
88 #define CONFIG_USB_TTY                  1
89 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
90
91 /* Change these to suit your needs */
92 #define CONFIG_USBD_VENDORID            0x0451
93 #define CONFIG_USBD_PRODUCTID           0x5678
94 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
95 #define CONFIG_USBD_PRODUCT_NAME        "IGEP"
96
97 /* commands to include */
98 #include <config_cmd_default.h>
99
100 #define CONFIG_CMD_CACHE
101 #define CONFIG_CMD_EXT4
102 #define CONFIG_CMD_FAT          /* FAT support                  */
103 #define CONFIG_CMD_FS_GENERIC
104 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
105 #define CONFIG_CMD_MMC          /* MMC support                  */
106 #ifdef CONFIG_BOOT_ONENAND
107 #define CONFIG_CMD_ONENAND      /* ONENAND support              */
108 #endif
109 #ifdef CONFIG_BOOT_NAND
110 #define CONFIG_CMD_NAND
111 #endif
112 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
113     (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
114 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
115 #endif
116 #define CONFIG_CMD_DHCP
117 #define CONFIG_CMD_PING
118 #define CONFIG_CMD_NFS          /* NFS support                  */
119 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
120 #define CONFIG_MTD_DEVICE
121
122 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
123 #undef CONFIG_CMD_IMLS          /* List all found images        */
124
125 #define CONFIG_SYS_NO_FLASH
126 #define CONFIG_HARD_I2C                 1
127 #define CONFIG_SYS_I2C_SPEED            100000
128 #define CONFIG_SYS_I2C_SLAVE            1
129 #define CONFIG_DRIVER_OMAP34XX_I2C      1
130
131 /*
132  * TWL4030
133  */
134 #define CONFIG_TWL4030_POWER            1
135
136 #define CONFIG_BOOTDELAY                3
137
138 #define CONFIG_EXTRA_ENV_SETTINGS \
139         "usbtty=cdc_acm\0" \
140         "loadaddr=0x82000000\0" \
141         "usbtty=cdc_acm\0" \
142         "console=ttyO2,115200n8\0" \
143         "mpurate=auto\0" \
144         "vram=12M\0" \
145         "dvimode=1024x768MR-16@60\0" \
146         "defaultdisplay=dvi\0" \
147         "mmcdev=0\0" \
148         "mmcroot=/dev/mmcblk0p2 rw\0" \
149         "mmcrootfstype=ext4 rootwait\0" \
150         "nandroot=/dev/mtdblock4 rw\0" \
151         "nandrootfstype=jffs2\0" \
152         "mmcargs=setenv bootargs console=${console} " \
153                 "mpurate=${mpurate} " \
154                 "vram=${vram} " \
155                 "omapfb.mode=dvi:${dvimode} " \
156                 "omapfb.debug=y " \
157                 "omapdss.def_disp=${defaultdisplay} " \
158                 "root=${mmcroot} " \
159                 "rootfstype=${mmcrootfstype}\0" \
160         "nandargs=setenv bootargs console=${console} " \
161                 "mpurate=${mpurate} " \
162                 "vram=${vram} " \
163                 "omapfb.mode=dvi:${dvimode} " \
164                 "omapfb.debug=y " \
165                 "omapdss.def_disp=${defaultdisplay} " \
166                 "root=${nandroot} " \
167                 "rootfstype=${nandrootfstype}\0" \
168         "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
169         "importbootenv=echo Importing environment from mmc ...; " \
170                 "env import -t $loadaddr $filesize\0" \
171         "loadzimage=load mmc ${mmcdev} ${loadaddr} zImage\0" \
172         "mmcboot=echo Booting from mmc ...; " \
173                 "run mmcargs; " \
174                 "bootz ${loadaddr}\0" \
175         "nandboot=echo Booting from onenand ...; " \
176                 "run nandargs; " \
177                 "onenand read ${loadaddr} 280000 400000; " \
178                 "bootz ${loadaddr}\0" \
179
180 #define CONFIG_BOOTCOMMAND \
181         "mmc dev ${mmcdev}; if mmc rescan; then " \
182                 "echo SD/MMC found on device ${mmcdev};" \
183                 "if run loadbootenv; then " \
184                         "run importbootenv;" \
185                 "fi;" \
186                 "if test -n $uenvcmd; then " \
187                         "echo Running uenvcmd ...;" \
188                         "run uenvcmd;" \
189                 "fi;" \
190                 "if run loadzimage; then " \
191                         "run mmcboot;" \
192                 "fi;" \
193         "fi;" \
194         "run nandboot;" \
195
196 #define CONFIG_AUTO_COMPLETE            1
197
198 /*
199  * Miscellaneous configurable options
200  */
201 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
202 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
203 #define CONFIG_SYS_PROMPT               "U-Boot # "
204 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
205 /* Print Buffer Size */
206 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
207                                         sizeof(CONFIG_SYS_PROMPT) + 16)
208 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
209 /* Boot Argument Buffer Size */
210 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
211
212 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
213                                                                 /* works on */
214 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
215                                         0x01F00000) /* 31MB */
216
217 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
218                                                         /* load address */
219
220 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
221
222 /*
223  * OMAP3 has 12 GP timers, they can be driven by the system clock
224  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
225  * This rate is divided by a local divisor.
226  */
227 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
228 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
229 #define CONFIG_SYS_HZ                   1000
230
231 /*
232  * Physical Memory Map
233  *
234  */
235 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
236 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
237 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
238
239 /*
240  * FLASH and environment organization
241  */
242
243 #ifdef CONFIG_BOOT_ONENAND
244 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
245
246 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
247
248 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
249
250 #define CONFIG_ENV_IS_IN_ONENAND        1
251 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
252 #define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
253 #endif
254
255 #ifdef CONFIG_BOOT_NAND
256 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
257 #define CONFIG_NAND_OMAP_GPMC
258 #define CONFIG_SYS_NAND_BASE            NAND_BASE
259 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
260 #define CONFIG_ENV_OFFSET               0x260000 /* environment starts here */
261 #define CONFIG_ENV_IS_IN_NAND           1
262 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
263 #define CONFIG_ENV_ADDR                 NAND_ENV_OFFSET
264 #define CONFIG_SYS_MAX_NAND_DEVICE      1
265 #endif
266
267 /*
268  * Size of malloc() pool
269  */
270 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
271
272 /*
273  * SMSC911x Ethernet
274  */
275 #if defined(CONFIG_CMD_NET)
276 #define CONFIG_SMC911X
277 #define CONFIG_SMC911X_32_BIT
278 #define CONFIG_SMC911X_BASE     0x2C000000
279 #endif /* (CONFIG_CMD_NET) */
280
281 /*
282  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
283  * and older u-boot.bin with the new U-Boot SPL.
284  */
285 #define CONFIG_SYS_TEXT_BASE            0x80008000
286 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
287 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
288 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
289 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
290                                          CONFIG_SYS_INIT_RAM_SIZE - \
291                                          GENERATED_GBL_DATA_SIZE)
292
293 /* SPL */
294 #define CONFIG_SPL
295 #define CONFIG_SPL_FRAMEWORK
296 #define CONFIG_SPL_NAND_SIMPLE
297 #define CONFIG_SPL_TEXT_BASE            0x40200800
298 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)
299 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
300
301 /* move malloc and bss high to prevent clashing with the main image */
302 #define CONFIG_SYS_SPL_MALLOC_START     0x87000000
303 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
304 #define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
305 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
306
307 /* MMC boot config */
308 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
309 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
310 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
311 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
312
313 #define CONFIG_SPL_BOARD_INIT
314 #define CONFIG_SPL_LIBCOMMON_SUPPORT
315 #define CONFIG_SPL_LIBDISK_SUPPORT
316 #define CONFIG_SPL_I2C_SUPPORT
317 #define CONFIG_SPL_LIBGENERIC_SUPPORT
318 #define CONFIG_SPL_MMC_SUPPORT
319 #define CONFIG_SPL_FAT_SUPPORT
320 #define CONFIG_SPL_SERIAL_SUPPORT
321
322 #define CONFIG_SPL_POWER_SUPPORT
323 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
324
325 #ifdef CONFIG_BOOT_ONENAND
326 #define CONFIG_SPL_ONENAND_SUPPORT
327
328 /* OneNAND boot config */
329 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
330 #define CONFIG_SYS_ONENAND_PAGE_SIZE    2048
331 #define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
332 #define CONFIG_SPL_ONENAND_LOAD_SIZE    \
333         (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
334
335 #endif
336
337 #ifdef CONFIG_BOOT_NAND
338 #define CONFIG_SPL_NAND_SUPPORT
339 #define CONFIG_SPL_NAND_BASE
340 #define CONFIG_SPL_NAND_DRIVERS
341 #define CONFIG_SPL_NAND_ECC
342
343 /* NAND boot config */
344 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
345 #define CONFIG_SYS_NAND_PAGE_COUNT      64
346 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
347 #define CONFIG_SYS_NAND_OOBSIZE         64
348 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
349 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
350 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
351                                                 10, 11, 12, 13}
352 #define CONFIG_SYS_NAND_ECCSIZE         512
353 #define CONFIG_SYS_NAND_ECCBYTES        3
354 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
355 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
356 #endif
357
358 #endif /* __IGEP00X0_H */