a2e70ffef2e27a44caf26e44d728b3d963e21210
[platform/kernel/u-boot.git] / include / configs / igep00x0.h
1 /*
2  * Common configuration settings for IGEP technology based boards
3  *
4  * (C) Copyright 2012
5  * ISEE 2007 SL, <www.iseebcn.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+ 
8  */
9
10 #ifndef __IGEP00X0_H
11 #define __IGEP00X0_H
12
13 #include <asm/sizes.h>
14
15 /*
16  * High Level Configuration Options
17  */
18 #define CONFIG_OMAP             1       /* in a TI OMAP core */
19 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
20 #define CONFIG_OMAP_GPIO
21 #define CONFIG_OMAP_COMMON
22
23 #define CONFIG_SDRC     /* The chip has SDRC controller */
24
25 #include <asm/arch/cpu.h>
26 #include <asm/arch/omap3.h>
27 #include <asm/mach-types.h>
28
29 /*
30  * Display CPU and Board information
31  */
32 #define CONFIG_DISPLAY_CPUINFO          1
33 #define CONFIG_DISPLAY_BOARDINFO        1
34
35 /* Clock Defines */
36 #define V_OSCK                  26000000        /* Clock output from T2 */
37 #define V_SCLK                  (V_OSCK >> 1)
38
39 #define CONFIG_MISC_INIT_R
40
41 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
42 #define CONFIG_SETUP_MEMORY_TAGS        1
43 #define CONFIG_INITRD_TAG               1
44 #define CONFIG_REVISION_TAG             1
45
46 #define CONFIG_OF_LIBFDT
47 #define CONFIG_CMD_BOOTZ
48
49 /*
50  * NS16550 Configuration
51  */
52
53 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
54
55 #define CONFIG_SYS_NS16550
56 #define CONFIG_SYS_NS16550_SERIAL
57 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
58 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
59
60 /* select serial console configuration */
61 #define CONFIG_CONS_INDEX               3
62 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
63 #define CONFIG_SERIAL3                  3
64
65 /* allow to overwrite serial and ethaddr */
66 #define CONFIG_ENV_OVERWRITE
67 #define CONFIG_BAUDRATE                 115200
68 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
69                                         115200}
70 #define CONFIG_GENERIC_MMC              1
71 #define CONFIG_MMC                      1
72 #define CONFIG_OMAP_HSMMC               1
73 #define CONFIG_DOS_PARTITION            1
74
75 /* define to enable boot progress via leds */
76 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
77     (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
78 #define CONFIG_SHOW_BOOT_PROGRESS
79 #endif
80
81 /* USB */
82 #define CONFIG_MUSB_UDC                 1
83 #define CONFIG_USB_OMAP3                1
84 #define CONFIG_TWL4030_USB              1
85
86 /* USB device configuration */
87 #define CONFIG_USB_DEVICE               1
88 #define CONFIG_USB_TTY                  1
89 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
90
91 /* Change these to suit your needs */
92 #define CONFIG_USBD_VENDORID            0x0451
93 #define CONFIG_USBD_PRODUCTID           0x5678
94 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
95 #define CONFIG_USBD_PRODUCT_NAME        "IGEP"
96
97 /* commands to include */
98 #include <config_cmd_default.h>
99
100 #define CONFIG_CMD_CACHE
101 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
102 #define CONFIG_CMD_FAT          /* FAT support                  */
103 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
104 #define CONFIG_CMD_MMC          /* MMC support                  */
105 #ifdef CONFIG_BOOT_ONENAND
106 #define CONFIG_CMD_ONENAND      /* ONENAND support              */
107 #endif
108 #ifdef CONFIG_BOOT_NAND
109 #define CONFIG_CMD_NAND
110 #endif
111 #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
112     (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
113 #define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
114 #endif
115 #define CONFIG_CMD_DHCP
116 #define CONFIG_CMD_PING
117 #define CONFIG_CMD_NFS          /* NFS support                  */
118 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
119 #define CONFIG_MTD_DEVICE
120
121 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
122 #undef CONFIG_CMD_IMLS          /* List all found images        */
123
124 #define CONFIG_SYS_NO_FLASH
125 #define CONFIG_HARD_I2C                 1
126 #define CONFIG_SYS_I2C_SPEED            100000
127 #define CONFIG_SYS_I2C_SLAVE            1
128 #define CONFIG_DRIVER_OMAP34XX_I2C      1
129
130 /*
131  * TWL4030
132  */
133 #define CONFIG_TWL4030_POWER            1
134
135 #define CONFIG_BOOTDELAY                3
136
137 #define CONFIG_EXTRA_ENV_SETTINGS \
138         "usbtty=cdc_acm\0" \
139         "loadaddr=0x82000000\0" \
140         "usbtty=cdc_acm\0" \
141         "console=ttyO2,115200n8\0" \
142         "mpurate=auto\0" \
143         "vram=12M\0" \
144         "dvimode=1024x768MR-16@60\0" \
145         "defaultdisplay=dvi\0" \
146         "mmcdev=0\0" \
147         "mmcroot=/dev/mmcblk0p2 rw\0" \
148         "mmcrootfstype=ext4 rootwait\0" \
149         "nandroot=/dev/mtdblock4 rw\0" \
150         "nandrootfstype=jffs2\0" \
151         "mmcargs=setenv bootargs console=${console} " \
152                 "mpurate=${mpurate} " \
153                 "vram=${vram} " \
154                 "omapfb.mode=dvi:${dvimode} " \
155                 "omapfb.debug=y " \
156                 "omapdss.def_disp=${defaultdisplay} " \
157                 "root=${mmcroot} " \
158                 "rootfstype=${mmcrootfstype}\0" \
159         "nandargs=setenv bootargs console=${console} " \
160                 "mpurate=${mpurate} " \
161                 "vram=${vram} " \
162                 "omapfb.mode=dvi:${dvimode} " \
163                 "omapfb.debug=y " \
164                 "omapdss.def_disp=${defaultdisplay} " \
165                 "root=${nandroot} " \
166                 "rootfstype=${nandrootfstype}\0" \
167         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
168         "importbootenv=echo Importing environment from mmc ...; " \
169                 "env import -t $loadaddr $filesize\0" \
170         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
171         "mmcboot=echo Booting from mmc ...; " \
172                 "run mmcargs; " \
173                 "bootm ${loadaddr}\0" \
174         "nandboot=echo Booting from onenand ...; " \
175                 "run nandargs; " \
176                 "onenand read ${loadaddr} 280000 400000; " \
177                 "bootm ${loadaddr}\0" \
178
179 #define CONFIG_BOOTCOMMAND \
180         "mmc dev ${mmcdev}; if mmc rescan; then " \
181                 "echo SD/MMC found on device ${mmcdev};" \
182                 "if run loadbootenv; then " \
183                         "run importbootenv;" \
184                 "fi;" \
185                 "if test -n $uenvcmd; then " \
186                         "echo Running uenvcmd ...;" \
187                         "run uenvcmd;" \
188                 "fi;" \
189                 "if run loaduimage; then " \
190                         "run mmcboot;" \
191                 "fi;" \
192         "fi;" \
193         "run nandboot;" \
194
195 #define CONFIG_AUTO_COMPLETE            1
196
197 /*
198  * Miscellaneous configurable options
199  */
200 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
201 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
202 #define CONFIG_SYS_PROMPT               "U-Boot # "
203 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
204 /* Print Buffer Size */
205 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
206                                         sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
208 /* Boot Argument Buffer Size */
209 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
210
211 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
212                                                                 /* works on */
213 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
214                                         0x01F00000) /* 31MB */
215
216 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
217                                                         /* load address */
218
219 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
220
221 /*
222  * OMAP3 has 12 GP timers, they can be driven by the system clock
223  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
224  * This rate is divided by a local divisor.
225  */
226 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
227 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
228 #define CONFIG_SYS_HZ                   1000
229
230 /*
231  * Physical Memory Map
232  *
233  */
234 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
235 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
236 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
237
238 /*
239  * FLASH and environment organization
240  */
241
242 #ifdef CONFIG_BOOT_ONENAND
243 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
244
245 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
246
247 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
248
249 #define CONFIG_ENV_IS_IN_ONENAND        1
250 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
251 #define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
252 #endif
253
254 #ifdef CONFIG_BOOT_NAND
255 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
256 #define CONFIG_NAND_OMAP_GPMC
257 #define CONFIG_SYS_NAND_BASE            NAND_BASE
258 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
259 #define CONFIG_ENV_OFFSET               0x260000 /* environment starts here */
260 #define CONFIG_ENV_IS_IN_NAND           1
261 #define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
262 #define CONFIG_ENV_ADDR                 NAND_ENV_OFFSET
263 #define CONFIG_SYS_MAX_NAND_DEVICE      1
264 #endif
265
266 /*
267  * Size of malloc() pool
268  */
269 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
270
271 /*
272  * SMSC911x Ethernet
273  */
274 #if defined(CONFIG_CMD_NET)
275 #define CONFIG_SMC911X
276 #define CONFIG_SMC911X_32_BIT
277 #define CONFIG_SMC911X_BASE     0x2C000000
278 #endif /* (CONFIG_CMD_NET) */
279
280 /*
281  * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
282  * and older u-boot.bin with the new U-Boot SPL.
283  */
284 #define CONFIG_SYS_TEXT_BASE            0x80008000
285 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
286 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
287 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
288 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
289                                          CONFIG_SYS_INIT_RAM_SIZE - \
290                                          GENERATED_GBL_DATA_SIZE)
291
292 /* SPL */
293 #define CONFIG_SPL
294 #define CONFIG_SPL_FRAMEWORK
295 #define CONFIG_SPL_NAND_SIMPLE
296 #define CONFIG_SPL_TEXT_BASE            0x40200800
297 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)
298 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
299
300 /* move malloc and bss high to prevent clashing with the main image */
301 #define CONFIG_SYS_SPL_MALLOC_START     0x87000000
302 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
303 #define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
304 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
305
306 /* MMC boot config */
307 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
308 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
309 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
310 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
311
312 #define CONFIG_SPL_BOARD_INIT
313 #define CONFIG_SPL_LIBCOMMON_SUPPORT
314 #define CONFIG_SPL_LIBDISK_SUPPORT
315 #define CONFIG_SPL_I2C_SUPPORT
316 #define CONFIG_SPL_LIBGENERIC_SUPPORT
317 #define CONFIG_SPL_MMC_SUPPORT
318 #define CONFIG_SPL_FAT_SUPPORT
319 #define CONFIG_SPL_SERIAL_SUPPORT
320
321 #define CONFIG_SPL_POWER_SUPPORT
322 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
323
324 #ifdef CONFIG_BOOT_ONENAND
325 #define CONFIG_SPL_ONENAND_SUPPORT
326
327 /* OneNAND boot config */
328 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
329 #define CONFIG_SYS_ONENAND_PAGE_SIZE    2048
330 #define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
331 #define CONFIG_SPL_ONENAND_LOAD_SIZE    \
332         (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
333
334 #endif
335
336 #ifdef CONFIG_BOOT_NAND
337 #define CONFIG_SPL_NAND_SUPPORT
338 #define CONFIG_SPL_NAND_BASE
339 #define CONFIG_SPL_NAND_DRIVERS
340 #define CONFIG_SPL_NAND_ECC
341
342 /* NAND boot config */
343 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
344 #define CONFIG_SYS_NAND_PAGE_COUNT      64
345 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
346 #define CONFIG_SYS_NAND_OOBSIZE         64
347 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
348 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
349 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
350                                                 10, 11, 12, 13}
351 #define CONFIG_SYS_NAND_ECCSIZE         512
352 #define CONFIG_SYS_NAND_ECCBYTES        3
353 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
354 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
355 #endif
356
357 #endif /* __IGEP00X0_H */