1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
7 * Copyright (c) 2011 IDS GmbH, Germany
8 * Sergej Stepanov <ste@ids.de>
15 * High Level Configuration Options
17 #define CONFIG_FSL_ELBC
19 #define CONFIG_BOOT_RETRY_TIME 900
20 #define CONFIG_BOOT_RETRY_MIN 30
21 #define CONFIG_RESET_TO_RETRY
23 #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
24 #define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
26 #define CONFIG_SYS_SICRH 0x00000000
27 #define CONFIG_SYS_SICRL (SICRL_LBC | SICRL_SPI_D)
29 #define CONFIG_HWCONFIG
32 * Definitions for initial stack pointer and data area (in DCACHE )
34 #define CONFIG_SYS_INIT_RAM_LOCK
35 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000
36 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in DPRAM */
37 #define CONFIG_SYS_GBL_DATA_SIZE 0x100
38 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE \
39 - CONFIG_SYS_GBL_DATA_SIZE)
40 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
43 * Local Bus LCRR and LBCR regs
45 #define CONFIG_SYS_LCRR_EADC LCRR_EADC_1
46 #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_2
47 #define CONFIG_SYS_LBC_LBCR (0x00040000 |\
48 (0xFF << LBCR_BMT_SHIFT) |\
51 #define CONFIG_SYS_LBC_MRTPR 0x20000000
54 * Internal Definitions
59 #define CONFIG_SYS_DDR_BASE 0x00000000
60 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
61 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
64 * Manually set up DDR parameters,
65 * as this board has not the SPD connected to I2C.
67 #define CONFIG_SYS_DDR_SIZE 256 /* MB */
68 #define CONFIG_SYS_DDR_CONFIG (CSCONFIG_EN |\
70 CSCONFIG_ROW_BIT_13 |\
73 #define CONFIG_SYS_DDR_CONFIG_256 (CONFIG_SYS_DDR_CONFIG | \
76 #define CONFIG_SYS_DDR_TIMING_3 (1 << 16) /* ext refrec */
77 #define CONFIG_SYS_DDR_TIMING_0 ((3 << TIMING_CFG0_RWT_SHIFT) |\
78 (3 << TIMING_CFG0_WRT_SHIFT) |\
79 (3 << TIMING_CFG0_RRT_SHIFT) |\
80 (3 << TIMING_CFG0_WWT_SHIFT) |\
81 (6 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) |\
82 (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) |\
83 (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \
84 (2 << TIMING_CFG0_MRS_CYC_SHIFT))
85 #define CONFIG_SYS_DDR_TIMING_1 ((4 << TIMING_CFG1_PRETOACT_SHIFT) |\
86 (12 << TIMING_CFG1_ACTTOPRE_SHIFT) |\
87 (4 << TIMING_CFG1_ACTTORW_SHIFT) |\
88 (7 << TIMING_CFG1_CASLAT_SHIFT) |\
89 (4 << TIMING_CFG1_REFREC_SHIFT) |\
90 (4 << TIMING_CFG1_WRREC_SHIFT) |\
91 (2 << TIMING_CFG1_ACTTOACT_SHIFT) |\
92 (2 << TIMING_CFG1_WRTORD_SHIFT))
93 #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) |\
94 (5 << TIMING_CFG2_CPO_SHIFT) |\
95 (4 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) |\
96 (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) |\
97 (0 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) |\
98 (1 << TIMING_CFG2_CKE_PLS_SHIFT) |\
99 (6 << TIMING_CFG2_FOUR_ACT_SHIFT))
101 #define CONFIG_SYS_DDR_INTERVAL ((0x800 << SDRAM_INTERVAL_REFINT_SHIFT) |\
102 (0x800 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
104 #define CONFIG_SYS_SDRAM_CFG (SDRAM_CFG_SREN |\
105 SDRAM_CFG_2T_EN | SDRAM_CFG_HSE |\
107 SDRAM_CFG_SDRAM_TYPE_DDR2)
109 #define CONFIG_SYS_SDRAM_CFG2 0x00401000
110 #define CONFIG_SYS_DDR_MODE ((0x0448 << SDRAM_MODE_ESD_SHIFT) |\
111 (0x0242 << SDRAM_MODE_SD_SHIFT))
112 #define CONFIG_SYS_DDR_MODE_2 0x00000000
113 #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075
114 #define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_EN |\
130 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
131 #define CONFIG_FLASH_SHOW_PROGRESS 50
133 #define CONFIG_SYS_FLASH_BASE 0xFF800000
134 #define CONFIG_SYS_FLASH_SIZE 8
137 #define CONFIG_SYS_MAX_FLASH_BANKS 1
138 #define CONFIG_SYS_MAX_FLASH_SECT 128
140 #define CONFIG_SYS_FLASH_ERASE_TOUT 60000
141 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
146 #define CONFIG_SYS_NAND_BASE 0xE1000000
147 #define CONFIG_SYS_MAX_NAND_DEVICE 1
148 #define CONFIG_SYS_NAND_MAX_CHIPS 1
149 #define CONFIG_NAND_FSL_ELBC
150 #define CONFIG_SYS_NAND_PAGE_SIZE (2048)
151 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
152 #define NAND_CACHE_PAGES 64
158 #define CONFIG_SYS_MRAM_BASE 0xE2000000
159 #define CONFIG_SYS_MRAM_SIZE 0x20000 /* 128 Kb */
161 #define CONFIG_SYS_OR_TIMING_MRAM
167 #define CONFIG_SYS_CPLD_BASE 0xE3000000
168 #define CONFIG_SYS_CPLD_SIZE 0x8000
170 #define CONFIG_SYS_OR_TIMING_MRAM
176 #define CONFIG_WATCHDOG 1
177 #define CONFIG_SYS_WATCHDOG_VALUE 0xFFFF
182 #define CONFIG_SYS_I2C
183 #define CONFIG_SYS_I2C_FSL
184 #define CONFIG_SYS_FSL_I2C_SPEED 400000
185 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
186 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3100
187 #define CONFIG_RTC_PCF8563
188 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
194 #define CONFIG_HAS_ETH0
195 #define CONFIG_TSEC1_NAME "TSEC0"
196 #define CONFIG_SYS_TSEC1_OFFSET 0x24000
197 #define TSEC1_PHY_ADDR 0x1
198 #define TSEC1_FLAGS TSEC_GIGABIT
199 #define TSEC1_PHYIDX 0
203 #define CONFIG_HAS_ETH1
204 #define CONFIG_TSEC2_NAME "TSEC1"
205 #define CONFIG_SYS_TSEC2_OFFSET 0x25000
206 #define TSEC2_PHY_ADDR 0x3
207 #define TSEC2_FLAGS TSEC_GIGABIT
208 #define TSEC2_PHYIDX 0
210 #define CONFIG_ETHPRIME "TSEC1"
215 #define CONFIG_SYS_NS16550_SERIAL
216 #define CONFIG_SYS_NS16550_REG_SIZE 1
218 #define CONFIG_SYS_BAUDRATE_TABLE \
219 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
220 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
221 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
222 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
224 #define CONFIG_HAS_FSL_DR_USB
225 #define CONFIG_SYS_SCCR_USBDRCM 3
228 * U-Boot environment setup
230 #define CONFIG_BOOTP_BOOTFILESIZE
233 * The reserved memory
235 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
236 #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
237 #define CONFIG_SYS_MALLOC_LEN (8 * 1024 * 1024)
240 * Environment Configuration
242 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE \
243 + CONFIG_SYS_MONITOR_LEN)
244 #define CONFIG_ENV_SIZE 0x20000
245 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
246 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
248 #define CONFIG_NETDEV eth1
249 #define CONFIG_HOSTNAME "ids8313"
250 #define CONFIG_ROOTPATH "/opt/eldk-4.2/ppc_6xx"
251 #define CONFIG_BOOTFILE "ids8313/uImage"
252 #define CONFIG_UBOOTPATH "ids8313/u-boot.bin"
253 #define CONFIG_FDTFILE "ids8313/ids8313.dtb"
254 #define CONFIG_LOADADDR 0x400000
255 #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo"
257 /* Initial Memory map for Linux*/
258 #define CONFIG_SYS_BOOTMAPSZ (256 << 20)
261 * Miscellaneous configurable options
263 #define CONFIG_SYS_CBSIZE 1024
264 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
266 #define CONFIG_SYS_MEMTEST_START 0x00001000
267 #define CONFIG_SYS_MEMTEST_END 0x00C00000
269 #define CONFIG_SYS_LOAD_ADDR 0x100000
270 #define CONFIG_LOADS_ECHO
271 #define CONFIG_TIMESTAMP
272 #define CONFIG_PREBOOT "echo;" \
273 "echo Type \\\"run nfsboot\\\" " \
274 "to mount root filesystem over NFS;echo"
275 #define CONFIG_BOOTCOMMAND "run boot_cramfs"
276 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
278 #define CONFIG_JFFS2_NAND
279 #define CONFIG_JFFS2_DEV "0"
281 /* mtdparts command line support */
283 #define CONFIG_EXTRA_ENV_SETTINGS \
284 "netdev=" __stringify(CONFIG_NETDEV) "\0" \
286 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
287 "tftpflash=tftpboot ${loadaddr} ${uboot}; " \
288 "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \
290 "erase " __stringify(CONFIG_SYS_TEXT_BASE) \
292 "cp.b ${loadaddr} " __stringify(CONFIG_SYS_TEXT_BASE) \
294 "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \
296 "cmp.b ${loadaddr} " __stringify(CONFIG_SYS_TEXT_BASE) \
299 "fdtaddr=0x780000\0" \
300 "kernel_addr=ff800000\0" \
301 "fdtfile=" __stringify(CONFIG_FDTFILE) "\0" \
302 "setbootargs=setenv bootargs " \
303 "root=${rootdev} rw console=${console}," \
304 "${baudrate} ${othbootargs}\0" \
305 "setipargs=setenv bootargs root=${rootdev} rw " \
306 "nfsroot=${serverip}:${rootpath} " \
307 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
308 "${netmask}:${hostname}:${netdev}:off " \
309 "console=${console},${baudrate} ${othbootargs}\0" \
310 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
311 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
312 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
315 #define CONFIG_NFSBOOTCOMMAND \
316 "setenv rootdev /dev/nfs;" \
317 "run setipargs;run addmtd;" \
318 "tftp ${loadaddr} ${bootfile};" \
319 "tftp ${fdtaddr} ${fdtfile};" \
320 "fdt addr ${fdtaddr};" \
321 "bootm ${loadaddr} - ${fdtaddr}"
325 #endif /* __CONFIG_H */