2 * U-boot - Configuration file for IBF-DSP561 board
5 #ifndef __CONFIG_IBF_DSP561__H__
6 #define __CONFIG_IBF_DSP561__H__
8 #include <asm/config-pre.h>
14 #define CONFIG_BFIN_CPU bf561-0.5
15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
23 /* CONFIG_CLKIN_HZ is any value in Hz */
24 #define CONFIG_CLKIN_HZ 25000000
25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
27 #define CONFIG_CLKIN_HALF 0
28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
30 #define CONFIG_PLL_BYPASS 0
31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32 /* Values can range from 0-63 (where 0 means 64) */
33 #define CONFIG_VCO_MULT 24
34 /* CCLK_DIV controls the core clock divider */
35 /* Values can be 1, 2, 4, or 8 ONLY */
36 #define CONFIG_CCLK_DIV 1
37 /* SCLK_DIV controls the system clock divider */
38 /* Values can range from 1-15 */
39 #define CONFIG_SCLK_DIV 5
45 #define CONFIG_MEM_ADD_WDTH 9
46 #define CONFIG_MEM_SIZE 64
48 #define CONFIG_EBIU_SDRRC_VAL 0x377
49 #define CONFIG_EBIU_SDGCTL_VAL 0x91998d
50 #define CONFIG_EBIU_SDBCTL_VAL 0x15
52 #define CONFIG_EBIU_AMGCTL_VAL 0x3F
53 #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
54 #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
56 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
57 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
63 #define ADI_CMDS_NETWORK 1
64 #define CONFIG_DRIVER_AX88180 1
65 #define AX88180_BASE 0x2c000000
66 #define CONFIG_HOSTNAME ibf-dsp561
67 /* Uncomment next line to use fixed MAC address */
68 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
74 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
75 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
76 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
77 #define CONFIG_SYS_FLASH_BASE 0x20000000
78 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
79 #define CONFIG_SYS_MAX_FLASH_SECT 135 /* max number of sectors on one chip */
80 /* The BF561-EZKIT uses a top boot flash */
81 #define CONFIG_ENV_IS_IN_FLASH 1
82 #define CONFIG_ENV_OFFSET 0x4000
83 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
84 #define CONFIG_ENV_SIZE 0x2000
85 #define CONFIG_ENV_SECT_SIZE 0x10000 /* Total Size of Environment Sector */
86 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
87 #define ENV_IS_EMBEDDED
89 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
91 #ifdef ENV_IS_EMBEDDED
92 /* WARNING - the following is hand-optimized to fit within
93 * the sector before the environment sector. If it throws
94 * an error during compilation remove an object here to get
95 * it linked after the configuration sector.
97 # define LDS_BOARD_TEXT \
98 arch/blackfin/lib/libblackfin.o (.text*); \
99 arch/blackfin/cpu/libblackfin.o (.text*); \
100 . = DEFINED(env_offset) ? env_offset : .; \
101 common/env_embedded.o (.text*);
108 #define CONFIG_SYS_I2C
109 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
110 #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
111 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
116 #define CONFIG_UART_CONSOLE 0
120 * Pull in common ADI header for remaining command/environment setup
122 #include <configs/bfin_adi_common.h>