2 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
4 * Based on davinci_dvevm.h. Original Copyrights follow:
6 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 #define CONFIG_SYS_USE_NAND 1
34 #define CONFIG_MACH_DAVINCI_HAWK
35 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
36 #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
37 #define CONFIG_SOC_DA850 /* TI DA850 SoC */
38 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
39 #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
40 #define CONFIG_SYS_OSCIN_FREQ 24000000
41 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
42 #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
43 #define CONFIG_SYS_HZ 1000
44 #define CONFIG_SKIP_LOWLEVEL_INIT
45 #define CONFIG_BOARD_EARLY_INIT_F
46 #define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
48 #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
49 DAVINCI_SYSCFG_SUSPSRC_EMAC | \
50 DAVINCI_SYSCFG_SUSPSRC_I2C | \
51 DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
52 DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
53 DAVINCI_SYSCFG_SUSPSRC_UART2)
55 #if defined(CONFIG_UART_U_BOOT)
56 #define CONFIG_SYS_TEXT_BASE 0xc1080000
57 #elif !defined(CONFIG_SPL_BUILD)
58 #define CONFIG_SYS_TEXT_BASE 0xc1180000
63 #define CONFIG_SPL_NAND_SUPPORT
64 #define CONFIG_SPL_NAND_SIMPLE
65 #define CONFIG_SPL_NAND_LOAD
66 #define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
67 #define CONFIG_SPL_SERIAL_SUPPORT
68 #define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
69 #define CONFIG_SPL_TEXT_BASE 0xc1080000
70 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
75 #define CONFIG_SYS_MALLOC_LEN (1*1024*1024) /* malloc() len */
76 #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
77 #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */
78 #define CONFIG_SYS_SDRAM_BASE 0xc0000000
79 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
80 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
81 GENERATED_GBL_DATA_SIZE)
83 /* memtest start addr */
84 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
86 /* memtest will be run on 16MB */
87 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
89 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
94 #define CONFIG_SYS_NS16550
95 #define CONFIG_SYS_NS16550_SERIAL
96 #define CONFIG_SYS_NS16550_REG_SIZE -4
97 #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
98 #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
99 #define CONFIG_CONS_INDEX 1
100 #define CONFIG_BAUDRATE 115200
103 * Network & Ethernet Configuration
105 #define CONFIG_DRIVER_TI_EMAC
107 #define CONFIG_BOOTP_DEFAULT
108 #define CONFIG_BOOTP_DNS
109 #define CONFIG_BOOTP_DNS2
110 #define CONFIG_BOOTP_SEND_HOSTNAME
111 #define CONFIG_NET_RETRY_COUNT 10
116 #ifdef CONFIG_SYS_USE_NAND
117 #define CONFIG_SYS_NO_FLASH
118 #define CONFIG_ENV_IS_IN_NAND
119 #define CONFIG_ENV_SIZE (128 << 10)
120 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
121 #define CONFIG_CLE_MASK 0x10
122 #define CONFIG_ALE_MASK 0x8
123 #define CONFIG_SYS_NAND_USE_FLASH_BBT
124 #define CONFIG_NAND_DAVINCI
125 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
126 #define CONFIG_SYS_NAND_HW_ECC_OOBFIRST /* SPL nand driver configuration */
127 #define CFG_DAVINCI_STD_NAND_LAYOUT
128 #define CONFIG_SYS_NAND_CS 3
129 #define CONFIG_SYS_NAND_PAGE_2K
130 /* Max number of NAND devices */
131 #define CONFIG_SYS_MAX_NAND_DEVICE 1
132 #define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
133 /* Block 0--not used by bootcode */
134 #define CONFIG_ENV_OFFSET 0x0
136 #define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
137 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
138 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
139 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
140 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
141 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
142 #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
143 CONFIG_SYS_NAND_U_BOOT_SIZE - \
144 CONFIG_SYS_MALLOC_LEN - \
145 GENERATED_GBL_DATA_SIZE)
146 #define CONFIG_SYS_NAND_ECCPOS { \
147 24, 25, 26, 27, 28, \
148 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
149 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
150 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
152 #define CONFIG_SYS_NAND_PAGE_COUNT 64
153 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
154 #define CONFIG_SYS_NAND_ECCSIZE 512
155 #define CONFIG_SYS_NAND_ECCBYTES 10
156 #define CONFIG_SYS_NAND_OOBSIZE 64
158 #endif /* CONFIG_SYS_USE_NAND */
161 #define CONFIG_SYS_USB_OHCI_CPU_INIT
162 #define CONFIG_USB_OHCI_NEW
163 #define CONFIG_USB_OHCI_DA8XX
164 #define CONFIG_USB_STORAGE
165 #define CONFIG_DOS_PARTITION
166 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
167 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
168 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
171 * U-Boot general configuration
173 #define CONFIG_MISC_INIT_R
174 #define CONFIG_BOOTFILE "uImage" /* Boot file name */
175 #define CONFIG_SYS_PROMPT "hawkboard > " /* Command Prompt */
176 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
177 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
178 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
179 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
180 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
181 #define CONFIG_VERSION_VARIABLE
182 #define CONFIG_AUTO_COMPLETE
183 #define CONFIG_SYS_HUSH_PARSER
184 #define CONFIG_CMDLINE_EDITING
185 #define CONFIG_SYS_LONGHELP
186 #define CONFIG_CRC32_VERIFY
187 #define CONFIG_MX_CYCLIC
192 #define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
193 #define CONFIG_CMDLINE_TAG
194 #define CONFIG_SETUP_MEMORY_TAGS
195 #define CONFIG_BOOTARGS \
196 "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
198 #define CONFIG_BOOTDELAY 3
203 #include <config_cmd_default.h>
204 #define CONFIG_CMD_ENV
205 #define CONFIG_CMD_ASKENV
206 #define CONFIG_CMD_DHCP
207 #define CONFIG_CMD_DIAG
208 #define CONFIG_CMD_MII
209 #define CONFIG_CMD_PING
210 #define CONFIG_CMD_SAVES
211 #define CONFIG_CMD_MEMORY
212 #define CONFIG_CMD_USB
213 #define CONFIG_CMD_EXT2
215 #ifdef CONFIG_CMD_BDI
216 #define CONFIG_CLOCKS
219 #ifdef CONFIG_SYS_USE_NAND
220 #undef CONFIG_CMD_FLASH
221 #undef CONFIG_CMD_IMLS
222 #define CONFIG_CMD_NAND
225 #ifndef CONFIG_DRIVER_TI_EMAC
226 #undef CONFIG_CMD_NET
227 #undef CONFIG_CMD_DHCP
228 #undef CONFIG_CMD_MII
229 #undef CONFIG_CMD_PING
232 #endif /* __CONFIG_H */