3 * BRIEF MODULE DESCRIPTION
4 * TI H2 and P2 Debug Board hardware map
6 * Copyright (C) 2004 MPC-Data Limited. (http://www.mpc-data.co.uk)
7 * Author: MPC-Data Limited
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __INCLUDED_H2_P2_DBH_BOARD_H
14 #define __INCLUDED_H2_P2_DBH_BOARD_H
16 #include <asm/sizes.h>
19 * The Debug board is designed to function with the P2 Sample, H2
20 * Sample and 1610 Innovator boards. The main difference AFAICT is
21 * the chip selects used with each system ;
23 * P2 Sample : CS1 of OMAP730 is used to select the CPLD & LAN regs
24 * H2 Sample : CS1a is used to select the CPLD registers.
28 /***************************************************************************
30 **************************************************************************/
32 #define H2DBG_CPLD_REVISION 0x04000010
33 #define H2DBG_BOARD_REVISION 0x04000012
34 #define H2DBG_GPIO_REGISTER 0x04000014
35 #define H2DBG_LED_CONTROL 0x04000016
36 #define H2DBG_MISC_INPUT 0x04000018
37 #define H2DBG_LAN_STATUS 0x0400001A
38 #define H2DBG_LAN_RESET 0x0400001C
39 #define H2DBG_ETH_REG_BASE 0x04000300
41 /***************************************************************************
42 * Ethernet Control Registers
43 * These are for the LAN91C96 on the debug board
44 **************************************************************************/
46 /* Bank 0 in IO space */
48 #define ETH_TCR (H2DBG_ETH_REG_BASE + 0x00) /* Transmit Control Register */
49 #define ETH_EPH_STATUS (H2DBG_ETH_REG_BASE + 0x02) /* EPH Status Register */
50 #define ETH_RCR (H2DBG_ETH_REG_BASE + 0x04) /* Receive Control Register */
51 #define ETH_COUNTER (H2DBG_ETH_REG_BASE + 0x06) /* Counter Register */
52 #define ETH_MIR (H2DBG_ETH_REG_BASE + 0x08) /* Memory Information Register */
53 #define ETH_MCR (H2DBG_ETH_REG_BASE + 0x0A) /* Memory Configuration Register */
55 /* Bank 1 in IO space */
57 #define ETH_CONFIG (H2DBG_ETH_REG_BASE + 0x00) /* Configuration Register */
58 #define ETH_BASE (H2DBG_ETH_REG_BASE + 0x02) /* Base Address Register */
59 #define ETH_IA0 (H2DBG_ETH_REG_BASE + 0x04) /* Individual Address Register - 0 */
60 #define ETH_IA1 (H2DBG_ETH_REG_BASE + 0x05) /* Individual Address Register - 1 */
61 #define ETH_IA2 (H2DBG_ETH_REG_BASE + 0x06) /* Individual Address Register - 2 */
62 #define ETH_IA3 (H2DBG_ETH_REG_BASE + 0x07) /* Individual Address Register - 3 */
63 #define ETH_IA4 (H2DBG_ETH_REG_BASE + 0x08) /* Individual Address Register - 4 */
64 #define ETH_IA5 (H2DBG_ETH_REG_BASE + 0x09) /* Individual Address Register - 5 */
65 #define ETH_GEN_PURPOSE (H2DBG_ETH_REG_BASE + 0x0A) /* General Address Registers */
66 #define ETH_CONTROL (H2DBG_ETH_REG_BASE + 0x0B) /* Control Register */
68 /* Bank 2 in IO space */
70 #define ETH_MMU (H2DBG_ETH_REG_BASE + 0x00) /* MMU Command Register */
71 #define ETH_AUTO_TX_START (H2DBG_ETH_REG_BASE + 0x01) /* Auto Tx Start Register */
72 #define ETH_PNR (H2DBG_ETH_REG_BASE + 0x02) /* Packet Number Register */
73 #define ETH_ARR (H2DBG_ETH_REG_BASE + 0x03) /* Allocation Result Register */
74 #define ETH_FIFO (H2DBG_ETH_REG_BASE + 0x04) /* FIFO Ports Register */
75 #define ETH_POINTER (H2DBG_ETH_REG_BASE + 0x06) /* Pointer Register */
76 #define ETH_DATA_HIGH (H2DBG_ETH_REG_BASE + 0x08) /* Data High Register */
77 #define ETH_DATA_LOW (H2DBG_ETH_REG_BASE + 0x0A) /* Data Low Register */
78 #define ETH_INT_STATS (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Status Register - RO */
79 #define ETH_INT_ACK (H2DBG_ETH_REG_BASE + 0x0C) /* Interrupt Acknowledge Register -WO */
80 #define ETH_INT_MASK (H2DBG_ETH_REG_BASE + 0x0D) /* Interrupt Mask Register */
86 * A couple of utility inlines to aid debugging using the LED's on the
90 static inline void set_led_state(int state)
92 static unsigned long hw_led_state = 0;
93 volatile unsigned short *led_address = (volatile unsigned short *)0x04000016;
95 hw_led_state = ((unsigned long)state);
96 *((unsigned short *) (led_address)) = (unsigned short) (~hw_led_state & 0xFFFF);
100 static inline void spin_up_leds(void)
102 volatile int i, j, k;
104 for (k = 0; k < 2; k++) {
105 for (i = 0; i < 16; i++) {
106 for (j = 0; j < 5000; j++) {
107 set_led_state(1 << i);
110 for (i = 15; i >= 0; i--) {
111 for (j = 0; j < 5000; j++) {
112 set_led_state(1 << i);
118 #endif /* ! __ASSEMBLY__ */
120 #endif /* ! __INCLUDED_H2_P2_DBH_BOARD_H */