3 * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
5 * Configuration settings for the grasshopper (ICnova AP7000) board
7 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __GRASSHOPPER_CONFIG_H
10 #define __GRASSHOPPER_CONFIG_H
12 #include <asm/arch/hardware.h>
15 #define CONFIG_AT32AP7000
18 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
19 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
21 * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
24 #define CONFIG_SYS_POWER_MANAGER
25 #define CONFIG_SYS_OSC0_HZ 20000000
26 #define CONFIG_SYS_PLL0_DIV 1
27 #define CONFIG_SYS_PLL0_MUL 7
28 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
30 * Set the CPU running at:
31 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
33 #define CONFIG_SYS_CLKDIV_CPU 0
35 * Set the HSB running at:
36 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
38 #define CONFIG_SYS_CLKDIV_HSB 1
40 * Set the PBA running at:
41 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
43 #define CONFIG_SYS_CLKDIV_PBA 2
45 * Set the PBB running at:
46 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
48 #define CONFIG_SYS_CLKDIV_PBB 1
50 /* Reserve VM regions for SDRAM and NOR flash */
51 #define CONFIG_SYS_NR_VM_REGIONS 2
54 * The PLLOPT register controls the PLL like this:
58 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
60 #define CONFIG_SYS_PLL0_OPT 0x04
62 #define CONFIG_USART_BASE ATMEL_BASE_USART1
63 #define CONFIG_USART_ID 1
65 #define CONFIG_BOARD_EARLY_INIT_R
67 /* User serviceable stuff */
68 #define CONFIG_CMDLINE_TAG
69 #define CONFIG_SETUP_MEMORY_TAGS
70 #define CONFIG_INITRD_TAG
73 * After booting the board for the first time, new ethernet addresses
74 * should be generated and assigned to the environment variables
75 * "ethaddr". This is normally done during production.
77 #define CONFIG_OVERWRITE_ETHADDR_ONCE
82 #define CONFIG_BOOTP_SUBNETMASK
83 #define CONFIG_BOOTP_GATEWAY
86 * Command line configuration.
88 /* add useful commands */
89 #define CONFIG_CMD_REGINFO
91 #define CONFIG_AUTO_COMPLETE
92 #define CONFIG_CMDLINE_EDITING
94 #define CONFIG_ATMEL_USART
96 #define CONFIG_PORTMUX_PIO
97 #define CONFIG_SYS_NR_PIOS 5
98 #define CONFIG_SYS_HSDRAMC
100 #define CONFIG_SYS_DCACHE_LINESZ 32
101 #define CONFIG_SYS_ICACHE_LINESZ 32
103 #define CONFIG_NR_DRAM_BANKS 1
105 #define CONFIG_SYS_FLASH_CFI
106 #define CONFIG_FLASH_CFI_DRIVER
108 #define CONFIG_SYS_FLASH_BASE 0x00000000
109 #define CONFIG_SYS_FLASH_SIZE 0x800000
110 #define CONFIG_SYS_MAX_FLASH_BANKS 1
111 #define CONFIG_SYS_MAX_FLASH_SECT 135
113 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
114 #define CONFIG_SYS_TEXT_BASE 0x00000000
116 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
117 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
118 #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
120 #define CONFIG_ENV_IS_IN_FLASH
121 /* place u-boot env in flash sector after u-boot */
122 #define CONFIG_ENV_SIZE 0x10000
123 #define CONFIG_ENV_ADDR 0x20000
125 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + \
126 CONFIG_SYS_INTRAM_SIZE)
128 #define CONFIG_SYS_MALLOC_LEN (256*1024)
130 /* Allow 4MB for the kernel run-time image */
131 #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
132 #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
134 /* Other configuration settings that shouldn't have to change all that often */
135 #define CONFIG_SYS_CBSIZE 256
136 #define CONFIG_SYS_MAXARGS 16
137 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
138 sizeof(CONFIG_SYS_PROMPT) + 16)
139 #define CONFIG_SYS_LONGHELP
141 #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
142 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
144 #endif /* __GRASSHOPPER_CONFIG_H */
145 /* vim: set ts=8 noet: */