1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Timesys Corporation
4 * Copyright (C) 2015 General Electric Company
5 * Copyright (C) 2014 Advantech
6 * Copyright (C) 2012 Freescale Semiconductor, Inc.
8 * Configuration settings for the GE MX6Q Bx50v3 boards.
11 #ifndef __GE_BX50V3_CONFIG_H
12 #define __GE_BX50V3_CONFIG_H
14 #include <asm/arch/imx-regs.h>
15 #include <asm/mach-imx/gpio.h>
17 #define CONFIG_BOARD_NAME "General Electric Bx50v3"
19 #define CONFIG_MXC_UART_BASE UART3_BASE
20 #define CONSOLE_DEV "ttymxc2"
22 #define CONFIG_SUPPORT_EMMC_BOOT
25 #include "mx6_common.h"
26 #include <linux/sizes.h>
28 #define CONFIG_CMDLINE_TAG
29 #define CONFIG_SETUP_MEMORY_TAGS
30 #define CONFIG_INITRD_TAG
31 #define CONFIG_REVISION_TAG
32 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
34 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 6000
36 #define CONFIG_MXC_UART
39 #ifdef CONFIG_CMD_SATA
40 #define CONFIG_SYS_SATA_MAX_DEVICE 1
41 #define CONFIG_DWC_AHSATA_PORT_ID 0
42 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
48 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
49 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
50 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
51 #define CONFIG_MXC_USB_FLAGS 0
53 #define CONFIG_USBD_HS
54 #define CONFIG_USB_GADGET_MASS_STORAGE
57 /* Networking Configs */
59 #define CONFIG_FEC_MXC
60 #define IMX_FEC_BASE ENET_BASE_ADDR
61 #define CONFIG_FEC_XCV_TYPE RGMII
62 #define CONFIG_ETHPRIME "FEC"
63 #define CONFIG_FEC_MXC_PHYADDR 4
64 #define CONFIG_PHY_ATHEROS
69 /* allow to overwrite serial and ethaddr */
70 #define CONFIG_ENV_OVERWRITE
72 #define CONFIG_LOADADDR 0x12000000
77 "setenv ipaddr 172.16.2.10; setenv serverip 172.16.2.20; " \
78 "setenv gatewayip 172.16.2.20; setenv nfsserver 172.16.2.20; " \
79 "setenv netmask 255.255.255.0; setenv ethaddr ca:fe:de:ca:f0:11; " \
80 "setenv bootargs root=/dev/nfs nfsroot=${nfsserver}:/srv/nfs/,v3,tcp rw rootwait" \
81 "setenv bootargs $bootargs ip=${ipaddr}:${nfsserver}:${gatewayip}:${netmask}::eth0:off " \
82 "setenv bootargs $bootargs cma=128M bootcause=POR console=${console} ${videoargs} " \
83 "setenv bootargs $bootargs systemd.mask=helix-network-defaults.service " \
84 "setenv bootargs $bootargs watchdog.handle_boot_enabled=1\0" \
86 "run setnetworkboot; " \
87 "nfs ${loadaddr} /srv/nfs/fitImage; " \
88 "bootm ${loadaddr}#conf@${confidx}\0" \
90 #define CONFIG_NETWORKBOOTCOMMAND \
98 #define CONFIG_EXTRA_ENV_SETTINGS \
101 "image=/boot/fitImage\0" \
102 "fdt_high=0xffffffff\0" \
105 "rootdev=mmcblk0p\0" \
106 "quiet=quiet loglevel=0\0" \
107 "console=" CONSOLE_DEV "\0" \
108 "setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \
109 "ro rootwait cma=128M " \
110 "bootcause=${bootcause} " \
111 "${quiet} console=${console} ${rtc_status} " \
112 "${videoargs}" "\0" \
114 "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \
115 "then setenv quiet; fi\0" \
117 "ext2load ${dev} ${devnum}:${partnum} 0x7000A000 " \
118 "/boot/bootcause/firstboot\0" \
120 "setexpr partnum 3 - ${partnum}\0" \
122 "bx50_backlight_enable; " \
123 "msg=\"Monitor failed to start. Try again, or contact GE Service for support.\"; " \
125 "setenv stdout vga; " \
126 "echo \"\n\n\n\n \" $msg; " \
127 "setenv stdout serial; " \
128 "mw.b 0x7000A000 0xbc; " \
129 "mw.b 0x7000A001 0x00; " \
130 "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \
133 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
134 "run hasfirstboot || setenv partnum 0; " \
135 "if test ${partnum} != 0; then " \
136 "setenv bootcause REVERT; " \
137 "run swappartitions loadimage doboot; " \
139 "run failbootcmd\0" \
141 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
143 "echo Booting from ${dev}:${devnum}:${partnum} ...; " \
145 "bootm ${loadaddr}#conf@${confidx}\0" \
147 "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \
148 "run loadimage || run swappartitions && run loadimage || " \
149 "setenv partnum 0 && echo MISSING IMAGE;" \
151 "run failbootcmd\0" \
153 #define CONFIG_MMCBOOTCOMMAND \
154 "if mmc dev ${devnum}; then " \
159 #define CONFIG_USBBOOTCOMMAND \
160 "echo Unsupported; " \
162 #ifdef CONFIG_NFS_CMD
163 #define CONFIG_BOOTCOMMAND CONFIG_NETWORKBOOTCOMMAND
165 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
167 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
171 /* Miscellaneous configurable options */
173 #define CONFIG_SYS_MEMTEST_START 0x10000000
174 #define CONFIG_SYS_MEMTEST_END 0x10010000
175 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
177 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
179 /* Physical Memory Map */
180 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
182 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
183 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
184 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
186 #define CONFIG_SYS_INIT_SP_OFFSET \
187 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
188 #define CONFIG_SYS_INIT_SP_ADDR \
189 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
191 /* environment organization */
192 #define CONFIG_ENV_SIZE (8 * 1024)
193 #define CONFIG_ENV_OFFSET (768 * 1024)
194 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
196 #define CONFIG_SYS_FSL_USDHC_NUM 3
199 #define CONFIG_HIDE_LOGO_VERSION
200 #define CONFIG_IMX_HDMI
201 #define CONFIG_IMX_VIDEO_SKIP
202 #define CONFIG_CMD_BMP
204 #define CONFIG_PWM_IMX
205 #define CONFIG_IMX6_PWM_PER_CLK 66000000
208 #define CONFIG_PCI_PNP
209 #define CONFIG_PCI_SCAN_SHOW
210 #define CONFIG_PCIE_IMX
211 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
212 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
214 #define CONFIG_RTC_RX8010SJ
215 #define CONFIG_SYS_RTC_BUS_NUM 2
216 #define CONFIG_SYS_I2C_RTC_ADDR 0x32
219 #define CONFIG_SYS_I2C
220 #define CONFIG_SYS_I2C_MXC
221 #define CONFIG_SYS_I2C_SPEED 100000
222 #define CONFIG_SYS_I2C_MXC_I2C1
223 #define CONFIG_SYS_I2C_MXC_I2C2
224 #define CONFIG_SYS_I2C_MXC_I2C3
226 #define CONFIG_SYS_NUM_I2C_BUSES 11
227 #define CONFIG_SYS_I2C_MAX_HOPS 1
228 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
229 {1, {I2C_NULL_HOP} }, \
230 {2, {I2C_NULL_HOP} }, \
231 {0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
232 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
233 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
234 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
235 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
236 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
237 {0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
238 {0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
243 #endif /* __GE_BX50V3_CONFIG_H */